February 2002 - ixp1200 - lists.cs.princeton.edu

RE: [ixp1200] Cost of developping with KEIXP12EBAB
by Brandewie, Dirk J 11 Mar '02

11 Mar '02

Hi Loren, > Will the KEIXP12EBAB kits (which I am told include C0 Silicon) run ARM > Linux out of the box? (The SDK 2.0 documentation centers around the > development platform with the WinNT SBC, but states that you > dont need to > use the WinNT SBC, if you have your own workstation. This > seems to imply > that I should not have any trouble loading Linux on the evaluation kit > too, so long as I have a WinNT workstation.) The KEIXP12EBAB kits will run Linux out of the box you can find the distribution at ftp://ftp.netwinder.org/users/u/urnaik/. Be aware that SDK 2.0 does not support KEIXP12EBAB. All the tools may be used to develop code but the micro-ace infrastructure will not run. > > Does anyone know how much Intel wants for the Microengine C Compiler? > We are in the process of arranging special education pricing but don't have a final answer yet stay tuned. > What other tools are required that I don't know about? Not a required tool but another environment that runs on the eval system is available at http://www.cs.princeton.edu/nsg/vera/ > > Can you develop on the evaluation kit using only free software tools? Yes you can do all your development with the tools from the SDK and the GCC that is part of the Linux distribution. --Dirk

3 2

Date: Thu, 28 Feb 2002 11:25:30 -0800
by Yavatkar, Raj 28 Feb '02

28 Feb '02

Hi All: Here is a great new book that explains how to program 1200 with useful caveats and lots of good examples (comes with a CD containing working code) Amazon: http://www.amazon.com/exec/obidos/ASIN/097128878X/qid=1014917482/sr=8-1/ref= sr_8_1_1/102-9277335-3925739 Fatbrain: http://www1.fatbrain.com/asp/bookinfo/bookinfo.asp?theisbn=097128878X&vm= Barnes and Noble: http://shop.barnesandnoble.com/booksearch/isbnInquiry.asp?userid=22QBB1PCHO& mscssid=SFFP3NQR0UD69H7XX96JME39C5MPBKS7&isbn=097128878X

1 0

Vera build problem
by John H. Hartman 25 Feb '02

25 Feb '02

In trying to build IPmm and linking with libixprouter.a I'm getting memRead16 and memWrite16 as undefined. They are used in pktgen.c. Should they changed to memRead16be and memWrite16be, which are defined? -- John

2 1

Does anyone know how to enable ip_forwarding function of BV Linux?
by Victor 21 Feb '02

21 Feb '02

Hi, all I'm testing some program on SDK2.0, which has Linux running on StrongARM(the kernel version is 2.3.99-pre3-rmk3-np2). I wonder how to enable ip_forwarding on that version. It was said that you can use "echo 1 > /proc/sys/net/ipv4/ip_forwarding" to enable it on recent version, but I can't find that file on StrongARM. Thanks Victor

2 1

SDK 2 Linux, ...
by Mirko Benz 21 Feb '02

21 Feb '02

Hi, new to the list so some more questions: Is there support for the SDK 2.0 version of Linux for IXP12EB? Are there any updates/patches beyond the 2.3.99 (e.g. 2.4.x) kernel available? The PCI performance figures from the vera paper are not what I would expect. Is this really the maximum or what can be tweaked? Would using the I2O unit help? Are there other (non-INTEL) IXP related resources on the net? Regards, Mirko University of Technology Dresden, Germany

2 1

Microengine C compiler and Micro-ACE programming framework
by Didier CONTIS 20 Feb '02

20 Feb '02

I am trying to look for more info on how to write some Microengine C code that will integrate in the ACE framework. Has anyone look already into this ? Thanks in advance for any reply, Regards - Didier

1 0

Re:Evaluation of Vera
by Tan Chee Wei 01 Feb '02

01 Feb '02

Hi Scott and Zuki, Thank You for the prompt reply. The sgo problem has been resolved now. But may I know under what circumstances does one use "pcireset" ? This program hangs my machine too. I still could not figure out the problem with ping. 192.168.133.38--->[Port 1]Vera[Port 0]--->192.168.133.147 My routing cache is as follows: /* original */ {"192.168.133.38", "192.168.133.147", "00:E0:29:00:8A:57", "00:E0:29:00:8C:AE", 0x00}, {"192.168.133.147", "192.168.133.38", "00:E0:29:00:8C:AE", "00:E0:29:00:8A:57", 0x01}, /*mirror*/ {"192.168.133.38", "192.168.133.147", "00:E0:29:00:8A:57", "00:E0:29:00:8C:AE", 0x01}, {"192.168.133.147", "192.168.133.38", "00:E0:29:00:8C:AE", "00:E0:29:00:8A:57", 0x00}, Could I confirm that the last parameter ie. "0x00 or 0x01" points to the port that the microengines is supposed to transmit out ? a) The ETHsrc and ETHdst entries in the cache refer to the addresses to be put on the packet. If the ETHdst address does not match the computer to receive the packet the ping might not be recorded. I am still stuck at the point where the microengines can only receive. For each packet received, the SA repeatedly reads and writes as pointed out. None of the packet is transmitted. b) There might not be any microengines servicing the ports. What are the XMT_UE_BASE, XMT_CTX values in Libixprouter/common/src/config.h First, I used the original values: #define RCV_BASE_UE 0 #define RCV_UE_COUNT 2 #define RCV_CTX_COUNT 8 #define XMT_BASE_UE 4 #define XMT_UE_COUNT 2 #define XMT_CTX_COUNT 8 Control_BootUEs gives tid 16, pid 1, ntid 20 tid 20, pid 2, ntid 17 tid 17, pid 3, ntid 21 tid 21, pid 4, ntid 18 tid 18, pid 5, ntid 22 tid 22, pid 6, ntid 19 tid 19, pid 7, ntid 23 tid 23, pid 0, ntid 16 tid 0, pid 1, ntid 4 tid 4, pid 2, ntid 1 tid 1, pid 3, ntid 5 tid 5, pid 4, ntid 2 tid 2, pid 5, ntid 6 tid 6, pid 6, ntid 3 tid 3, pid 7, ntid 7 tid 7, pid 0, ntid 0 Does that mean uengine 0 to 1 are activated for receive and uengine 4 and 5 are activated for transmit ? Now if I change it as such and recompile everything: #define RCV_BASE_UE 0 #define RCV_UE_COUNT 4 #define RCV_CTX_COUNT 16 #define XMT_BASE_UE 4 #define XMT_UE_COUNT 2 #define XMT_CTX_COUNT 8 It means uengine 0 to 3 are utilised for receive and the remaining for transmit ? But the Control_BootUEs remains the same as above. c)I turned on Debugging and recompiled the ue source. But I did not get any new message other than the SA's messages on the minicom console. Am I missing something ? 4)I am interested in the layout of the queue in the memory and how this layout is mapped to the 8 ports. #define QUEUE_NO_BITS 3 #define XMT_Q_COUNT (1 << QUEUE_NO_BITS) This means I have 8 queues per port ? Thank You once again and kind regards, cheewei

3 2