June 2003 - ixp1200 - lists.cs.princeton.edu

Question on enp-2505
by Feng Tang 09 Sep '03

09 Sep '03

Hello, Currently, my problem when trying to boot linux is: After the board entered cygmon, I typed "go" command, then the minicom screen show below information: ****************** cygmon>go cygmon_handle_exception()monitor_loop return=0 Returned from breakpoint Waiting for host based download Press space bar to abort host download mode.... .. .. .. Press space bar to abort host download mode.... ******************** Then I open another terminal and entered the directory of /opt/ixasdk/enp-2505/bin. I run the script .create_environment.rc and boot_bv. The screen of boot_bv show: ********************* eht1: unknow interface: No such device rmmod: module pciDgNet is not loaded rmmod: module pciDg is not loaded Booting board before = 0x7e6c6700 ********************* Then the screen of minicom show below information: ******************** Booting linux.... Hit breakpointDisassembling 0xc4e9.8944 mrcge 13, 4, r9, cr3, cr14, {4} Waiting for host based download Press space bar to abort host download mode... Press space bar to abort host download mode... ..

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Re: [ixp1200] Compiling armtoolchain
by rasit＠cs.umanitoba.ca 23 Jul '03

23 Jul '03

Hi David, Moh'd is my student, so I can reply in behalf of him. Actually, unless 3 disk RH9 distribution is missing some package, your suggestion is not valid, as we installed *everything* on the host system, i.e., all packages on all 3 discs. As for the command *before* the failure, the whole package is build by a single make, so we don't know unless we dissect the makefile. You comments are still appreciated. Thanks, Rasit According to David Mentre: > > Hello, > > > From: Mohammad Shorfuzzaman [mailto:szaman@cs.umanitoba.ca] > > > I've downloaded the necessary tar files in the download directory and > > performed instruction as said in the README file. The > > completiion of "make" ends > > with these errors: > > > > makeinfo: Removing output file > > `/root/ixp1200_linux/src/glibc-2.1.3/manual/libc.info' due to > > errors; use > > --force to preserve. > > make[3]: *** [libc.info] Error 2 > > make[3]: Leaving directory > > `/root/ixp1200_linux/src/glibc-2.1.3/manual' > > make[2]: *** [manual/subdir_install] Error 2 > > make[2]: Leaving directory `/root/ixp1200_linux/src/glibc-2.1.3' > > make[1]: *** [install] Error 2 > > make[1]: Leaving directory `/root/ixp1200_linux/build/glibc-2.1.3' > > make: *** [glibc] Error 2 > > Your are not giving us enough information. You should give us the error > messages from the command executed before make aborts the compilation. > > As a rule of thumb, always give the last command executed by make. > > Anyway, I would say that your compilation fails to produce documentation, > probably because you don't have a needed package (info probably). > > Best regards, > d. > -- > David Mentré <mentre(a)tcl.ite.mee.com> - Research engineer > Mitsubishi Electric ITE-TCL / European Telecommunication Research Laboratory > > Phone: +33 2 23 45 58 29 / Fax: +33 2 23 45 58 59 > http://www.mitsubishi-electric-itce.fr > -- M. Rasit Eskicioglu E-mail: rasit(a)cs.umanitoba.ca Department of Computer Science Phone : (204) 474-8835 (Office) 528 Machray Hall (204) 474-8313 (Messages) University of Manitoba Fax : (204) 474-7609 Winnipeg, Manitoba R3T 2N2 Canada URL : http://www.cs.umanitoba.ca/~rasit

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The microACE "tutorial"
by Øyvind Hvamstad 11 Jul '03

11 Jul '03

Hi, I'm trying to do the "tutorial" for the ENP-2505 card. The card is up after numerous hours of compiling and tweeking. So now I am ready for some programming; I thought.. I tried to start with the Count_8_1 project. I follow the README in $IXROOT/src/microace/aces/tutorial1 and use the workbench to build the microACE. This results in a single .uof file, Count_8_1Gig.uof. I copy this to the $IXROOT/bin/arm-be directory, then I run export CONFIG=ARM_BE and make the code. I modify the ixsys.config file to use interface 0-3 and mode=0, then I copy it to $IXROOT/bin/arm-be. That's it. The output when I run ./ixstart on the board outputs: <snip> ConfigureFBusInterface: ENP has 64Bit IXbus. ConfigureFBusInterface: ENP has 64Bit IXbus. ixconfig: Initialized Resource Manager ixconfig: ix_task_init successful ixconfig: Created OSSL thread ixconfig: ix_res_open_sync successful ixconfig: ix_ns_open_sync successful ixconfig: File ./SlowIngressCount.uof doesn't Exist or doesn't have READ permission. </snip> I have searched all over for the file and the permissions are all set correctly. Now, where can I find this file? What am I doing wrong. I can't seem to run any other aces either. I tried the l3forward, but then I only get ixconfig: Invalid port number 2, even though the config file specifies the four first ports. Can anyone help? Please! I've been sitting all day. By the way sometimes the serial connection hangs during setup, after the kernel is loaded. Is there a better way for rebooting the card than rebooting the host? In advance thanks.. -- Øyvind Hvamstad

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RE: [ixp1200] HashSv functions? (accessing the hash units from t he SA)
by Griffin, Chris 26 Jun '03

26 Jun '03

Cyrus, On my installation of the Intel Developer's Workbench, the hashsv.h file is in C:\IXP1200\include --Chris Griffin Embedded Software Engineer Visual Networks, Inc. cgriffin(a)visualnetworks.com phone: 301-296-2644 fax: 301-296-2303 > -----Original Message----- > From: Cyrus Hall [SMTP:hallcp@cs.colorado.edu] > Sent: Thursday, June 26, 2003 4:27 PM > To: ixp1200 List > Subject: [ixp1200] HashSv functions? (accessing the hash units from > the SA) > > I'm in need of a way to initialize a hashtable for the microengines > later use. There appears to be no direct way to access the hash unit on > the FBI, but the Microcode Software Reference Manual lists a family of > functions called HashSv_* (HashSv_Init, etc). The manual lists the > prototypes as being in hashsv.h. > > Yet I can't find hashsv.h anywhere. Is this another documented, but > nonexistent piece of functionality? And if this is the case, how would > people suggest initializing a hash table on the SA for use by the > micros? The values to initialize the table will be coming from a > configuration file, so hard-coding the table in the ME's doesn't work > for me. > > Thanks all, > Cyrus

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HashSv functions? (accessing the hash units from the SA)
by Cyrus Hall 26 Jun '03

26 Jun '03

I'm in need of a way to initialize a hashtable for the microengines later use. There appears to be no direct way to access the hash unit on the FBI, but the Microcode Software Reference Manual lists a family of functions called HashSv_* (HashSv_Init, etc). The manual lists the prototypes as being in hashsv.h. Yet I can't find hashsv.h anywhere. Is this another documented, but nonexistent piece of functionality? And if this is the case, how would people suggest initializing a hash table on the SA for use by the micros? The values to initialize the table will be coming from a configuration file, so hard-coding the table in the ME's doesn't work for me. Thanks all, Cyrus

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Data transfer ,SDRAM
by Prashanth Ramaprasad 26 Jun '03

26 Jun '03

Hi, I have a very basic situation to start off my work on IXP1200. All I want to do is transfer data in blocks (say 1M) from the SDRAM to SRAM, efficiently. Could any of you help me with this hitch. Thank you, Prashanth. _________________________________________________________________ Tired of spam? Get advanced junk mail protection with MSN 8. http://join.msn.com/?page=features/junkmail

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None
by Prashanth Ramaprasad 25 Jun '03

25 Jun '03

Hi there, I recently started working on IXP1200 assembly. During my initial drudge, I was nailed down by this error >> Ref count starting at xfer reg, "$$sdram_reg" does not completely map into a previously specified contiguous region of xfer regs. I'm sure I'm missing something very fundamental. Could any of you help me out of this. Also could you tell me how to access the archives . Thank you, Prashanth. _________________________________________________________________ Add photos to your messages with MSN 8. Get 2 months FREE*. http://join.msn.com/?page=features/featuredemail

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C-Compiler with Optimizations and ua_get/ua_set
by Robert Klima 24 Jun '03

24 Jun '03

Hi, everyone wants lean and fast code, so do I. :) Unfortunately the IXA SDK C-Compiler refuses to properly compile the ua_get/ua_set instructions when optimization ist turned on (-O switch set for example via workbench Build:Settings:C-Compiler:Optimize:Speed). The ua_get/ua_set instructions lead to compile time errors like this : "Unable to determine memory region for ua_set" This does not happen when the compiler is told not to do optimization, so I suspect it to be a bug. The unoptimized code is far bigger (tested with ua_get/ua_set commented out) and innapropriate for serious testing. As I suspect unaligned access to be a common thing here my question into the round : Anyone seen this, too ? And more important - howto overcome this Problem ? By the way - switching to assembly code is not an option to me. ;) Example follows : #include "ixp.h" void main (void) { __declspec(sdram) long long *ptr; ua_set_16(ptr,0,1234); } void exit (unsigned int arg) { } With best regards and thanks in advance. Yours, Robert Klima.

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Re: [ixp1200] Receive error from giga port
by Wong Kim Sing 23 Jun '03

23 Jun '03

Hi, My work is on IXP1240. Which code are you trying, is it "L3Fw8_1f.ue"? For my case, I try to aggregate packet from FE port to GE port, and I have modified the reciving part of the FE code to transmit packet to GE port. Recently, I got a email regarding this problem, and it he said that it is due to the coordination issue in the TFIFO. Do you have any ideal on this issue? As what I suspect, it may be cause by the HW at the TFIFO. Hope we can help each other in solving this problem. Mike Wong Kim Sing R&D Engineer Institute for Communications Research 20 Science Park Road TeleTech Park #02-34/37 Singapore Science Park II Singapore 117674 Tel: 65 68729030 DID : 65 68709320 Fax: 65 67795441 Email: wongks(a)icr.a-star.edu.sg Website: http://www.icr.a-star.edu.sg >>> haritak(a)ics.forth.gr 06/23/03 08:00 AM >>> I am facing exactly the same problem and I haven't found a solution yet. I am working on ENP-2506. In my case the problem is : I move some data to SDRAM (one packet) and then I transmit it several times. What I observe is that some replicas of the packet are xmited fine, while sometimes bits are missing resulting in a smaller packet. The "phenomenon" seems quite periodic: 4 packets received fine, one packet reduced by 63Bytes, 4 packets received fine, one packet reduced by 103Bytes, 4 packets received fine, one packet reduced by 63Bytes, ... The bigger the packet (>15 MPKTs) the more frequent the errors. Smaller packets seem to be fine, however for 8MPKTS still I received one erroneous after some transmissions. I suspect there might be a chance of overflowding the xmit buffer on the port. However, the problem persisted even when the microCode was programmed to xmit only one packet and I was uploading it many times manually in order to produce replicas of the packet. But I am still working on that. So any (debugging) ideas are welcome. Thanks a lot for your time! Yannis Haritakis On Tue, 27 May 2003, Wong Kim Sing wrote: > Hi, > > I had this problem of receiving error packet from the giga port, here is how the test go. > > I had created some packets in the microengine, e.g. > > move($$dxfer0, 0xfffffff1) > move($$dxfer1, 0xfffffff3) > move($$dxfer2, 0xfffffff5) > move($$dxfer3, 0xfffffff7) > move($$dxfer4, 0xfffffff9) > move($$dxfer5, 0xfffffffb) > move($$dxfer6, 0xfffffffd) > move($$dxfer7, 0xffffffff) > > sdram[write, $$dxfer0, packet_buf_addr, 0, 4], ctx_swap > > move($$dxfer0, 0xfffffff1) > move($$dxfer1, 0xfffffff3) > move($$dxfer2, 0xfffffff5) > move($$dxfer3, 0xfffffff7) > move($$dxfer4, 0xfffffff9) > move($$dxfer5, 0xfffffffb) > move($$dxfer6, 0xfffffffd) > move($$dxfer7, 0xffffffff) > > sdram[write, $$dxfer0, packet_buf_addr, 4, 4], ctx_swap > > And I send out this packet to the giga port using the "L3fw8_1.uc" microcode from intel reference design. > > Result obtained as below: > > 19:21:03.445227 ff:f0:ff:ff:ff:f1 ff:ff:ff:f1:ff:ff ffff 116: > > fff2 ffff fff5 ffff fff4 ffff fff5 ffff > fff6 ffff fff9 ffff fff8 ffff fff9 ffff > fffa ffff fffd ffff fffc ffff fffd ffff > fffe ffff fff1 ffff fff0 ffff fff1 ffff > fff2 ffff fff5 ffff fff4 ffff fff5 ffff > fff6 > > On the first row and the fifth row, it should be "fff3" and "fff5" respectively, but it become "fff2" and "fff4", there is one bit being modified. > > And also from 2nd row onward,there is some duplication occur, the 2 words "ffff fff5" has been repeated two time in row 4 and row 6. > > Is there anyone has this similar problem before or do you have any ideal of solving this, please send a email, thank you. > > Mike Wong Kim Sing > R&D Engineer > Institute for Communications Research > 20 Science Park Road > TeleTech Park > #02-34/37 > Singapore Science Park II > Singapore 117674 > Tel: 65 68729030 DID : 65 68709320 > Fax: 65 67795441 > Email: wongks(a)i2r.a-star.edu.sg > Website: http://www.i2r.a-star.edu.sg > >

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Receive error from giga port
by Wong Kim Sing 21 Jun '03

21 Jun '03

Hi, I had this problem of receiving error packet from the giga port, here is how the test go. I had created some packets in the microengine, e.g. move($$dxfer0, 0xfffffff1) move($$dxfer1, 0xfffffff3) move($$dxfer2, 0xfffffff5) move($$dxfer3, 0xfffffff7) move($$dxfer4, 0xfffffff9) move($$dxfer5, 0xfffffffb) move($$dxfer6, 0xfffffffd) move($$dxfer7, 0xffffffff) sdram[write, $$dxfer0, packet_buf_addr, 0, 4], ctx_swap move($$dxfer0, 0xfffffff1) move($$dxfer1, 0xfffffff3) move($$dxfer2, 0xfffffff5) move($$dxfer3, 0xfffffff7) move($$dxfer4, 0xfffffff9) move($$dxfer5, 0xfffffffb) move($$dxfer6, 0xfffffffd) move($$dxfer7, 0xffffffff) sdram[write, $$dxfer0, packet_buf_addr, 4, 4], ctx_swap And I send out this packet to the giga port using the "L3fw8_1.uc" microcode from intel reference design. Result obtained as below: 19:21:03.445227 ff:f0:ff:ff:ff:f1 ff:ff:ff:f1:ff:ff ffff 116: fff2 ffff fff5 ffff fff4 ffff fff5 ffff fff6 ffff fff9 ffff fff8 ffff fff9 ffff fffa ffff fffd ffff fffc ffff fffd ffff fffe ffff fff1 ffff fff0 ffff fff1 ffff fff2 ffff fff5 ffff fff4 ffff fff5 ffff fff6 On the first row and the fifth row, it should be "fff3" and "fff5" respectively, but it become "fff2" and "fff4", there is one bit being modified. And also from 2nd row onward,there is some duplication occur, the 2 words "ffff fff5" has been repeated two time in row 4 and row 6. Is there anyone has this similar problem before or do you have any ideal of solving this, please send a email, thank you. Mike Wong Kim Sing R&D Engineer Institute for Communications Research 20 Science Park Road TeleTech Park #02-34/37 Singapore Science Park II Singapore 117674 Tel: 65 68729030 DID : 65 68709320 Fax: 65 67795441 Email: wongks(a)i2r.a-star.edu.sg Website: http://www.i2r.a-star.edu.sg

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