March 2004 - ixp1200 - lists.cs.princeton.edu

plugging an IXP1200 eval board into a regular PC causes infinite reboot
by wdebruij＠dds.nl 07 Apr '04

07 Apr '04

Hi all, to be able to use the evaluation boards on a regular basis I would like to move them onto a regular (active) PCI backplane. From the VERA project documentation I've gotten quite useful information, and from the georgia tech PCI drivers for the ENP I've managed to write to the card over PCI just fine. However, I'm experiencing a strange problem that I hope someone has seen before: when I plug in the board it keeps resetting itself. This appears to be related to the BootMgr software, as it nicely waits for user input when I enter its menu by pressing space. Running cygmon or the diagnostics will immediately reset the board, though. I'm using the netwinder flash with cygmon on a B0 board, by the way. at first I thought that it might have to do with receiving a possible interrupt from the backplane, but having tried all interrupt lines (and none at all), this does not appear to be the problem. Does this problem sound familiar to anyone? On a related note: we're trying to get the eval boards working as ENP boards, ie booting linux over PCI. So far I've managed to write drivers for directly accessing the onboard pci from the host in kernelspace and through mmmap in userspace. In case anyone's interested, the sources can be found in CVS on ffpf.sourceforge.net . As soon as I've worked out the last bugs I'll supply a regular distribution.

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RE: [ixp1200] Transmitting pkts out of Giga ports
by Kunze, Aaron 02 Apr '04

02 Apr '04

Chompi, I think I can answer some of these questions for you. I believe your intuition is correct and the transmit code is not filling the MAC buffers fast enough. The transmit code for this chapter was not tested on the gigabit ports, so it's no surprise that the code is not fast enough. However, the IXF1002 has a 2048 byte buffer per port. So, you should be able to send Ethernet packets of that size or less without underflowing. The trick is to set the "tx send threshold" to something large. This threshold is the number of bytes that must be in the buffer before the MAC starts transmitting. If this threshold is set large enough, you should never underflow. This setting can be adjusted in the simulator, and it can also be adjusted on the hardware using the IXF1002 driver. If you are on Linux, this is done from user space via IOCTLs. If you are on VxWorks, this is done through function calls. There are also two known bugs in the transmit code that we are trying to put up on the errata web page. This may be impacting your ability to run the code on the hardware. I have pasted the errata below. It should be up on the website soon. For your last question, unfortunately, I couldn't find any microC code for transmitting on gigabit ports, but that doesn't mean it doesn't exist. Maybe someone else on the list has something like that. Aaron Errata: ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Page: N/A Location: CD-ROM, Chapter09\transmit.c Description: The transmit code supplied in Chapter 9 does not properly handle packets larger than 64 bytes. There are two corrections: First, lines 169 and 170 should read: port_state.current_data_ptr = (void*)((unsigned int)(port_state.current_data_ptr) + (64 / sizeof(long long))); instead of: port_state.current_data_ptr = (void*)((unsigned int)(port_state.current_data_ptr) + 64); This correction accounts for the quad-word addressing of SDRAM on the IXP1200. The second correction is to add the following line after line 167: mpacket->eop = 0; This ensures the the per-mpacket state maintained by the fill threads gets properly initialized for each new packet. ------------------------------ Aaron Kunze Intel Research and Development aaron.kunze(a)intel.com ----PGP Key ID: 0x81124B7C---- ----NOT SPEAKING FOR INTEL---- ---------GO BOILERS!!--------- > -----Original Message----- > From: ixp1200-bounces(a)lists.cs.princeton.edu > [mailto:ixp1200-bounces@lists.cs.princeton.edu] On Behalf Of > chompi(a)softhome.net > Sent: Tuesday, March 30, 2004 4:04 AM > To: ixp1200(a)lists.cs.princeton.edu > Subject: [ixp1200] Transmitting pkts out of Giga ports > > > > Hi all, > > I've recently tried sample code from chap9 Johnson and Kunze > book and in > DWB, the code works fine with Fast Eth ports. However, if I > try to use GE > ports, it only works when MTU<=192 (<=3 Mpkts per pkt). If > there are >3 > Mpkts/pkt, the simulation halts with error "Transmit buffer > underflow". Does > this mean that the code is not filling up TFIFO fast enough? > Anyways, even if I set MTU<=192, I still cannot send out any > traffic on real > hardware (we are using ENP-2506). L3Fwdr reference design > works fine on the > board so I do not expect any hardware or configuration problems. > Did anybody encounter this issue before? Is there any sample > code (in micro > C) lying around that transmits data over GE ports? > > Any help is appreciated. > > Chompi. > _______________________________________________ > ixp1200 mailing list > ixp1200(a)lists.cs.princeton.edu > https://lists.cs.princeton.edu/mailman/listinfo/ixp1200 >

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ixp425 - AccessLibrary1.4 - ATM-Transfer
by Manfred Bergmann 30 Mar '04

30 Mar '04

Hi all, I've got a question concerning the UTOPIA/ATM transfer with the Intel AccessLibrary v1.4 on Linux. I am replenishing with IX_MBUFs that have the size of a page (4k). Access Library fills only 4080 bytes since this is a multiple of 48 bytes payload in AAL0_48 mode. Is there any chance that I get all bytes of a page filled since these pages are user-virtual mem mappings and I don't want to touch the received packets? I need the received data with no interruptions. Any ideas would be very welcome. Regards, Manfred Bergmann

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Transmitting pkts out of Giga ports
by chompi＠softhome.net 30 Mar '04

30 Mar '04

Hi all, I've recently tried sample code from chap9 Johnson and Kunze book and in DWB, the code works fine with Fast Eth ports. However, if I try to use GE ports, it only works when MTU<=192 (<=3 Mpkts per pkt). If there are >3 Mpkts/pkt, the simulation halts with error "Transmit buffer underflow". Does this mean that the code is not filling up TFIFO fast enough? Anyways, even if I set MTU<=192, I still cannot send out any traffic on real hardware (we are using ENP-2506). L3Fwdr reference design works fine on the board so I do not expect any hardware or configuration problems. Did anybody encounter this issue before? Is there any sample code (in micro C) lying around that transmits data over GE ports? Any help is appreciated. Chompi.

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Tornado 2.0 does not display value entered by user
by EK Lee 26 Mar '04

26 Mar '04

Hi all, I am writing a program to get some value from user via tornado 2.0 shell console. The value is received by scanf. But, I found that the value entered by users could not be displayed on the console. However, the value received by the program is correct. Any suggestion how can I make the value visible on the console screen? Thanks. Regards, ek _________________________________________________________________ Using a handphone prepaid card? Reload your credit online! http://www.msn.com.my/reloadredir/default.asp

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Binary format of ME instructions
by Luo, Yan 17 Mar '04

17 Mar '04

Hello, I wonder how to obtain the document on the binary format of ME instructions. In the *.list file, there is a hex value associated with each ME instruction, is the number the binary format of the corresponding instruction? If so, how do I interprete it? Thanks, Yan

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[Announce]: kernel module to reset IXP2400 from host
by romit dasgupta 16 Mar '04

16 Mar '04

Hello all, Many a times while developing kernel modules, I tend to hang my ENP-2611 radisys board. I thought it would be nice to develop an utility to reset the board from my host system. Attached is the source code for the same. It is easy to use. Once you have installed the kernel module in your host system, you can just issue echo "" > /proc/ntb and you can see the ENP board rebooting. The caveats are on the beginning of the source code. I hope it will make life easier for kernel programmers using radisys board. Regards, -Romit /* * This software may be used and distributed according to the terms * of GNU General Public License, incorporated herein by reference. */ /* * Author Romit Dasgupta (romit(a)myrealbox.com) * Apropos Infotech Ltd. (www.aproposinfotech.com), * Future Systems, Inc. (www.future.co.kr). */ /* * 21555 non transparent bridge driver to reset ENP-2611 * board from the host CPU. * After installing this module, if you want to reset * ENP-2611 board, just type * echo "" > /proc/ntb * Caveat: Load this module before invoking a reset * on ENP-2611 from redboot. * This has been compiled for 2.4.20-8 * * Version history : Released on 16th March 2004. * */ #include <linux/module.h> /* module_init, module_exit */ #include <linux/init.h> /* various macros */ #include <linux/pci.h> /* pci related fns */ #include <linux/proc_fs.h> /* proc related */ #include <linux/ioport.h> /* request_mem_region etc. */ #include <asm/io.h> /* ioremap, iounmap */ #ifdef DEBUG #define Debug(message) printk message #else #define Debug(message) #endif #ifndef PCI_DEVICE_ID_INTEL_21555 #define PCI_DEVICE_ID_INTEL_21555 0xb555 #endif #define DOWNSTREAM_XLAT1 0x98 #define CFG_ADDR_UCA_21555 0x88 static volatile char config_space[64*4]; static volatile char *cap_csr; static struct pci_device_id bridge_tbl[] __devinitdata = { {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_21555, PCI_ANY_ID, PCI_ANY_ID, }, {0,} }; static struct pci_dev *pcidev_21555; /* * Got the idea of interface checking from the mvnet source code. */ static int check_21555_interface(struct pci_dev *pdev) { u32 readword = 0, readback = 0; int result; /* * The upstream configuration address register can't be written * from the primary interface. Try to modify this register to * determine which interface we are connected to. */ result = pci_read_config_dword(pdev, CFG_ADDR_UCA_21555, &readword); if (result != PCIBIOS_SUCCESSFUL) { Debug(("21555: Error reading PCI configuration\n")); return -EIO; } result = pci_write_config_dword(pdev, CFG_ADDR_UCA_21555, ~readword); if (result != PCIBIOS_SUCCESSFUL) { Debug(("21555: Error writing PCI configuration\n")); return -EIO; } result = pci_read_config_dword(pdev, CFG_ADDR_UCA_21555, &readback); if (result != PCIBIOS_SUCCESSFUL) { Debug(("21555: Error reading back PCI configuration\n")); return -EIO; } /* Return 1 for primary, 0 for secondary interface */ return (readword == readback) ? 1 : 0; } static int configure_21555_CSRs(struct pci_dev *pdev) { int result; unsigned int value; /* * The IXP CSR space is mapped from location * 0 of PCI address space. */ result = pci_write_config_dword(pdev, DOWNSTREAM_XLAT1, 0x00000000); if (result != PCIBIOS_SUCCESSFUL) { Debug(("21555: Error writing translation CSR for Downstream 1.\n")); return -EIO; } result = pci_read_config_dword(pdev, DOWNSTREAM_XLAT1, &value); if (result != PCIBIOS_SUCCESSFUL) { Debug(("21555: Error reading translation CSR for Downstream 1.\n")); return -EIO; } else Debug(("21555: Translation Base for Downstream 1 is now 0x%x\n", value)); return result; } static int host_21555_pci_init(struct pci_dev *pdev, const struct pci_device_id *ent) { int result = -ENODEV; int primary; primary = check_21555_interface(pdev); if (unlikely(primary < 0)) goto err_out; Debug(("21555: %s interface\n", primary ? "host" : "local")); if (unlikely(primary == 0)) { printk("21555: Uhh! Trying to load this module on the secondary???\n"); goto err_out; } else result = 0; pcidev_21555 = pdev; if (check_mem_region(pci_resource_start(pdev, 2), 1024*1024)) { Debug(("21555: BAR 2 already mapped.\n")); result = -EBUSY; goto err_out1; } else request_mem_region(pci_resource_start(pdev, 2), 1024*1024, "21555 downstream window 1"); cap_csr = ioremap_nocache(pci_resource_start(pdev, 2), 1024*1024); if (cap_csr == NULL) { result = -ENOMEM; goto err_out; } else Debug(("21555: cap_csr at vaddr 0x%x\n", (unsigned int) cap_csr)); if (pci_enable_device(pdev) < 0) { Debug(("21555: Couldn't enable 21555 master.\n")); goto err_out1; } pci_set_master(pdev); /* Smooth sailing so far. Load the configuration registers now. */ result = configure_21555_CSRs(pdev); if (!result) return result; err_out1: if (cap_csr) { iounmap((void *)cap_csr); cap_csr = NULL; } err_out: return result; } static void host_21555_pci_remove(struct pci_dev *pdev) { pci_disable_device(pdev); if (cap_csr) { iounmap((void *) cap_csr); cap_csr = NULL; } if (check_mem_region(pci_resource_start(pdev, 2), 1024*1024)) { release_mem_region(pci_resource_start(pcidev_21555, 2), 1024*1024); } return; } static struct pci_driver host_21555_driver = { name: "host_21555", id_table: bridge_tbl, probe: host_21555_pci_init, remove: host_21555_pci_remove, /* TODO: Enable power management for this driver */ }; static int write_21555(struct file *file, const char *buffer, unsigned long count, void *data) { int i; MOD_INC_USE_COUNT; /* * Take care of user forced resets on ENP * by re-writing config space. */ for(i = 0; i < 256; i++) pci_write_config_byte(pcidev_21555, i, config_space[i]); /* * Reset the IXP. * Pg 332 of Intel IXP2400/2800 Network Processor, * Programmers reference manual (July 2003). */ *((int *)(cap_csr + 0x4a0c)) = (1<<16); MOD_DEC_USE_COUNT; return count; } static struct proc_dir_entry *write_21555_entry; int __init host_21555_init(void) { int result; int i; char value; printk("21555: Loading 21555 driver on the host CPU.\n"); result = pci_module_init(&host_21555_driver); if (!result) { write_21555_entry = create_proc_entry("ntb", 0644, NULL); if (write_21555_entry == NULL) { result = -ENOMEM; goto err_out; } write_21555_entry->owner = THIS_MODULE; write_21555_entry->write_proc = write_21555; } else return result; /* * save config space to handle * resets of the ENP by user. */ for(i = 0; i < 256; i++) { pci_read_config_byte(pcidev_21555, i, &value); config_space[i] = value; } return result; err_out: pci_unregister_driver(&host_21555_driver); return result; } void __exit host_21555_exit(void) { int i; /* * handle cases where the module was * loaded and unloaded after a user * reset of ENP. */ for(i = 0; i < 256; i++) pci_write_config_byte(pcidev_21555, i, config_space[i]); printk("21555: Removing the 21555 driver on the host CPU.\n"); pci_unregister_driver(&host_21555_driver); remove_proc_entry("ntb", NULL); return; } module_init(host_21555_init); module_exit(host_21555_exit); MODULE_LICENSE("GPL"); MODULE_DESCRIPTION("Intel 21555 bridge driver used to reset Radisys board from host"); /* * assmuming /usr/src/linux -> <actual source tree of currently running kernel> * Compile with * gcc -Wall -DMODULE -D__KERNEL__ -I /usr/src/linux/include -c -O2 hostb.c */

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need some header files
by Rajas Raut 15 Mar '04

15 Mar '04

Dear All I need three header files of IXP 1200 SDK . ixp.h, CSR.h and buffer.h if anybody can send it to me ...I will be highly thankful.. I need these files for a project of mine. Regards Rajas Raut www.rajasraut.cjb.net ----------------------------------------- (on isc) ________________________________________________________________________________ Mail Scanned: TREND InterScan VirusWall Information Superhighway Centre, IIT Roorkee ---------------------------------------------------------

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spread code over multiple microengines (using the ACE model)
by Tim Stevens 15 Mar '04

15 Mar '04

Hi all, Can anyone on this list provide me some details on how to spread code over several microengines (e.g. one ingress ACE on ME1, one L3 component on ME2, one egress component on ME3)? Until now, we have done everything on 2 microengines (when using the microACE framework, as presented in the tutorial), but distributing the load over more MEs seems more appropriate in the future. The configuration file (ixsys.config) requires one chooses between ingress or egress for each ace, but this is not suitable for the L3 component on ME2 (previous paragraph). Any ideas? Any help would be greatly appreciated! Kind regards, Tim

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RE: [ixp1200] 1K or 2K instruction cache?
by Tim Stevens 15 Mar '04

15 Mar '04

Hi Jim, And can you tell me how we can do that? Or how we tell the compiler to branch to the second store? Thanks! Regards, Tim At 17:33 15/03/2004, you wrote: >If you have the version of 1200 that contains 2k of instruction memory >you can have upto 2k of instructions. But the instructions are stored >in two separate 1k areas and you need to branch between the two areas. > >-----Original Message----- >From: Tim Stevens [mailto:tim.stevens@intec.ugent.be] >Sent: Monday, March 15, 2004 11:28 AM >To: ixp1200(a)lists.cs.princeton.edu >Subject: [ixp1200] 1K or 2K instruction cache? > > >Hi all, > >We use a RadiSys ENP-2505 board and encounter a problem concerning the >microengine instruction cache size. >Each time we compile the code, the compiler complains that it doesn't fit >into the instruction memory (total size between 1K and 2K instructions), >while our RadiSys documentation states that we have a 2K instruction >cache... >Does this mean that we have to set a specific compiler flag, or is one >instruction larger than one unit in the instruction cache (meaning that a >2K cache can only hold about 1K instructions)? > >Any help would be appreciated. > >Kind regards, > >Tim > >_______________________________________________ >ixp1200 mailing list >ixp1200(a)lists.cs.princeton.edu >https://lists.cs.princeton.edu/mailman/listinfo/ixp1200 > > > - - - - - - - Appended by Scientific-Atlanta, Inc. - - - - - - - >This e-mail and any attachments may contain information which is >confidential, proprietary, privileged or otherwise protected by law. The >information is solely intended for the named addressee (or a person >responsible for delivering it to the addressee). If you are not the >intended recipient of this message, you are not authorized to read, print, >retain, copy or disseminate this message or any part of it. If you have >received this e-mail in error, please notify the sender immediately by >return e-mail and delete it from your computer. > >_______________________________________________ >ixp1200 mailing list >ixp1200(a)lists.cs.princeton.edu >https://lists.cs.princeton.edu/mailman/listinfo/ixp1200

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