Dear all, Can anyone from Intel advise me on this: The IXF440 Datasheet dated from 1998 to the recent copy makes a reference to the register TERR_STT. (check TERR_STT on Page 34 and 50.) But I think this register cannot be found. I want to know whether TERR_STT is a typo error and what actually is meant is TXMT_STT (register that handles the causes for transmit stops) instead ? Can I also check whether the memory map for Slow ports (MAC 0 and 1) for both Evaluation board and Spectacle Island remains the same, as indicated in the mail "First Pass at Mac Address Map" found in the SDK CDROM: ie. it ranges from base 3840 0000 to base 3840 F000 ? For example 3840 3000 would mean Port 3. However, using OctalMAC_NetStat dump on Spectacle Island, I observed that the status for port 3 were gathered from 3840 3800 instead and not from 3840 3000. I tried to verify by dumping memory from StrongARM and the strange thing is memory portion at 3840 3000 had the corresponding data that I wanted but memory values at 3840 3800 were mostly zeroed. I also noticed that the MAC register TX_TSHD_BOFF was configured to be 0xa3 by NetAPP just before Developer Workbench was run to start the microengines but the moment after the microengines were started and running, TX_TSHD_BOFF changed to 0xaf (FIFO threshold increases dramatically). Shouldn't this threshold be fixed at the start by StrongARM and why should the FIFO threshold change only after microengines start to run? I also tried to read the Slow port portions that are memory mapped to Microengines' SRAM memory address space from 007f ffff to 0070 0000. From the programmer's manual, I know that the microengines can do so but it seems that I cannot read values in SRAM 007f ffff to 0070 0000 using memory watch in the Developer Workbench 2.1 for example sram[0x70182a]. Workbench reported undefined address. However the strange thing is that it read nicely from 0000 0000 to 001f ffff. May I know if there is something I can do to make the Workbench to read that address space ? I appreciate you reading through these questions. Thank You very much. Best regards, cheewei