Hi, I am interested in the SRAM command issuing and queuing in the SRAM functional unit. The hardware ref manul talked about how the command bus arbiter select commans from the command FIFOs. However, the exact timing is not stated in docs. For example, why does it take 3 cycles from issuing a sram reference command to enqueuing the command to the functional unit (as seen in the the thread history window) ? Also, it seems that removing a command from the SRAM queue cannot be done every cycle. It takes at least two cycles to dequeue the next command. Is it because the core and the sram bus operate at different frequency? I use IXP1200 now, I wonder how these parameter are different in IXP1200, IXP2400 and IXP2800? Could anyone please explain it or refer me to some useful documents? Any input will be appreciated. Thanks, Yan -- Yan Luo Dept. of CSE, Univ. of California Riverside, CA 92521, USA http://www.cs.ucr.edu/~yluo/