Wu,
Your book looks great. I plan on using it for the IXP course I'll be offering in the Spring.
It should be in the warehouse and ready to ship by Friday.
I was wondering if you planned on setting up an e-mail list for questions about the book and its labs or if you expect all questions to be directed to the Princeton list.
I have indeed set up a mailing list for the book: npbook.cs.purdue.edu However, I hope to use the book list just for conceptual questions, and forward all the detailed IXP questions to the Princeton list. Is that what you expected? Cheers, Doug
Hi, I was wondering if anyone has looked into passing the packet from ixp board from and to the host linux kernel through the pci bridge? I know it seems ridiculous since that will waste all the resources we have in the ixp board, anyway I'm just curious. Andrew Putra Jauri College of Engineering and Computer Science Portland State University
Andrew, The Princeton SOSP paper, "Building a Robust software-based router using NPs" has some measurements for forwarding rate from the IXP to the host PC. But this system is not linux based, if that is what you are looking for. There was some discussion regarding this on this mailing list sometime earlier which you can get in the archives. Also, I think Georgia Tech group had presented some numbers at the IXA 2002 workshop on moving packets between the IXP and host, I think. -- abhijeet On Tue, 28 Jan 2003, Andrew Putra Jauri wrote:
Hi,
I was wondering if anyone has looked into passing the packet from ixp board from and to the host linux kernel through the pci bridge? I know it seems ridiculous since that will waste all the resources we have in the ixp board, anyway I'm just curious.
Andrew Putra Jauri College of Engineering and Computer Science Portland State University
The PCI bus transfers in our SOSP paper were from the IXP1200 evaluation board (no non-transparent bridge) to the Pentium. The StrongARM was not running Linux; however, the Pentium was running Linux. For my thesis I did make measurements using a PowerPC based line card (RAMiX PMC694) which has a 21554 non-transparent bridge. The is the 32-bit version of the bridge on the Bridalveil board. If the Bridalveil board were installed in a 32-bit PCI system, I would expect the behavior of the bridges to be similar. The PMC694 code (with 21554 code) and links to papers are here: http://www.cs.princeton.edu/nsg/vera/ Scott On Wed, Jan 29, 2003 at 02:32:19AM -0700, Abhijeet Joglekar wrote:
Andrew,
The Princeton SOSP paper, "Building a Robust software-based router using NPs" has some measurements for forwarding rate from the IXP to the host PC. But this system is not linux based, if that is what you are looking for.
There was some discussion regarding this on this mailing list sometime earlier which you can get in the archives.
Also, I think Georgia Tech group had presented some numbers at the IXA 2002 workshop on moving packets between the IXP and host, I think.
-- abhijeet
On Tue, 28 Jan 2003, Andrew Putra Jauri wrote:
Hi,
I was wondering if anyone has looked into passing the packet from ixp board from and to the host linux kernel through the pci bridge? I know it seems ridiculous since that will waste all the resources we have in the ixp board, anyway I'm just curious.
Andrew Putra Jauri College of Engineering and Computer Science Portland State University
Andrew, Georgia Tech has a paper with the answer to your question coming up in the SAN-2 workshop (held jointly with HPCA 2003): "Intel IXP1200-based Network Processor" it has a lot of details on the limits of passing packets up and down between an IXP1200 (the Radisys ENP-2505) and a PC it's put into. --Ivan On Tue, 28 Jan 2003, Andrew Putra Jauri wrote:
Hi,
I was wondering if anyone has looked into passing the packet from ixp board from and to the host linux kernel through the pci bridge? I know it seems ridiculous since that will waste all the resources we have in the ixp board, anyway I'm just curious.
Andrew Putra Jauri College of Engineering and Computer Science Portland State University
------------------------------------------------------------------------------ Ivan Ganev 327236 Georgia Tech Station College of Computing Atlanta, GA 30332 Georgia Institute of Technology 1-(770)-321-4733 ganev@cc.gatech.edu http://www.cc.gatech.edu/~ganev ------------------------------------------------------------------------------ When you lose, don't lose the lesson. --Unknown Learning is not compulsory. Neither is survival. -- W. Edwards Deming
Here's a link: http://www.cc.gatech.edu/~kenmac/asan/asan-san-2.pdf We intend to post the code for this also, shortly. The short answers: o about 190MB/S IXP->host using IXP's DMA o slightly more host->IXP using PIOs with write-combining o about half that host->IXP using IXP's DMA but it's a known host chipset bug The host is a Dell 530 (Xeon w/860 chipset) The card is the Radisys card with the 21555 bridge The PCI slot in the host is 64/66 (but the IXP side is 32/66). -- Ken
Georgia Tech has a paper with the answer to your question coming up in the SAN-2 workshop (held jointly with HPCA 2003):
"Intel IXP1200-based Network Processor"
it has a lot of details on the limits of passing packets up and down between an IXP1200 (the Radisys ENP-2505) and a PC it's put into.
participants (6)
-
Abhijeet Joglekar -
Andrew Putra Jauri -
Douglas Comer -
Ivan Ganev -
Kenneth M. Mackenzie -
Scott Karlin