Hi, I faced a similar problem earlier. I wrote into the SROM of ENP for requesting downstream memory aligned at 1MB. Look into the 21555 SROM table in pg28 of ENP hardware reference manual. You can use the ntb_srom utitlity under the redboot prompt to write. Let me know if you need further details and I can send you the hex file I used. Regards, -Romit smiley wrote:

question ? ~~~! Since I still could not load the module, I changed hhnet_drawb.c. ---from---- #define DRAWB_CFG_SETUP_DS3 0xB8 #define DRAWB_CFG_CHIP_CONTROL_1 0xCE #define HHNET_DRAWB_MEM_SIZE (1024 * 1024) if (primary) { ... bar = 4; irq_handler = hhnet_drawb_intr_primary; } ---to---- #define DRAWB_CFG_SETUP_DS3 0xAC #define DRAWB_CFG_CHIP_CONTROL_1 0xCC #define HHNET_DRAWB_MEM_SIZE (4 * 1024) if (primary) { ... bar = 0; irq_handler = hhnet_drawb_intr_primary; } --- After the modification, I COULD load the module on both side, server, and ENP. But still I could not make them to communicate.

The dmesg & PCI info from the server side----------------- <dmesg> hhnet_drawb: mem_paddr = fe6b0000 hhnet_drawb: mem virt = f89d900

<pci> 03:08.0 Bridge: Intel Corp.: Unknown device b555 (rev 02) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort-

<pci> Bus 0, device 1, function 0: Bridge: PCI device 8086:b555 (Intel Corp.) (rev 2). IRQ 41. Non-prefetchable 32 bit memory at 0xe4000000 [0xe4000fff]. I/O at 0x100000 [0x1000ff]

As you can see, the mem_paddr of ENP is set as 00000000. I think this is the reason of the problem. I think the correct value is "0xe4000000". Am I correct? If then, how do I fix it?

Thank you in advance.

Regards, EunYoung Joo

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