StrongARM Core and Microengine Memory sharing
Hello Everybody, I am working on a project in which I have Snort running on the core and the the microengines are used to classify the packets. Now depending on the type of packet , TCP,UDP,ICMP etc the microengines write to specific registers with certian information regarding the packet and also the entire packet buffer. The snort code running on the core will read this information and process the packet accordingly. I will really appreciate it if anybody could how to make the microengines communicate with the core and get them to share memory. Also, is there any way that I can classify the packets using microEngine C. I will not be using the ACE framework. Any pointers or feedback will be greatly appreciated. Regards, Tabrez SUNY-Binghamton. __________________________________________________ Do You Yahoo!? Tired of spam? Yahoo! Mail has the best spam protection around http://mail.yahoo.com
participants (1)
-
tabrez rajani