Hi there all- I'm currently trying to build a table of address to parts of a filter I've written. IE, you have a value, index into the table, and jump to the associated address in code. The jumping is simple enough, save the PC and replace it, give up control, and wait for the ctx switch back in. Not hyper efficient, but not bad when you're only filter one or two fields. Returning is simple enough as well. The problem I'm having is actually get the address of code. This clearly needs to be done at compile time (there doesn't appear to be a linker involved in loading code onto the ME's), and would seem to be as simple as replacing the symbolic label with it's final address. Yet, there seems to be no way to do something like: immed32[var, label#:] Has anyone done anything like this and\or know how? Thanks, Cyrus
Hi, Does anyone know how to run more than 2 microengines on the IXP1200 card? I'm using the enp-2505 IXP1200 card with 4 10/100 mb ports. The count tutorial and the l3fwdr program from Intel use 2 microengines, 1 for ingress and the count/l3fwdr ACE and the other one for the egress. Perhaps someone has already tried this before, please give me some hints. Thanks in advance. Andrew Jauri College of Engineering and Computer Science Portland State University
Hi Andrew, You would have to modify the ixconfig application, to support new file types, new MicroAce types and also minor changes in the resource manager to ensure that dispatch loop vars and other ring variables are patched in the extra microengines which you enable. Files to look at * ixconfig/ixconfig.h (adding new file types etc) * ixconfig/microcode.c [SetupMicrocode() function. Check out case RM_UCODE_OTHER: You will have to add code here to call the RM to set up the new uof files which u want to download] * resource_manager/driver/dispatch.c ring.c and maybe other related files. Once you start making changes, you will be able to figure out which other places to look at. Below is some code snippet that I added in ixconfig.h/microcode.c/ ixsys.config. This should get you started. *************** ixconfig.h ---------- /*Added this for MicroAces whose MEB's do not run in ingress or egress pipelines */ #define RUNS_AS_PROCESSING_BLOCK 0x2 /*new microace type, like l2, l3 etc */ #define MICROACE_TYPE_SHAPER 8 enum fileType { ... .. . PROCESS_SHAPER_FILE, MAX_NUM_FILE_TYPES } microcode.c ------------ case RM_UCODE_OTHER: RmUengSetUofFile(meNum, filelist[PROCESS_SHAPER_FILE].pUcodeName, RM_UCODE_OTHER, filelist[PROCESS_SHAPER_FILE].pFileName); shaperMeMask |= (1 << meNum) ixsys.config ------------ /* 6 here is enum value for PROCESS_SHAPER_FILE */ file 6 ./ShaperEM.uof /* 2 is for RUNS_AS_PROCESSING_BLOCK, 8 is for MICROACE_TYPE_SHAPER */ microace Shaper ./shaper_ace none 2 8 *************** Basically, go through the source code of ixconfig app, follow each call to RM and you should be able to figure out which places to modify. -- abhijeet On Tue, 13 May 2003, Andrew Putra Jauri wrote:
Hi,
Does anyone know how to run more than 2 microengines on the IXP1200 card? I'm using the enp-2505 IXP1200 card with 4 10/100 mb ports. The count tutorial and the l3fwdr program from Intel use 2 microengines, 1 for ingress and the count/l3fwdr ACE and the other one for the egress. Perhaps someone has already tried this before, please give me some hints. Thanks in advance.
Andrew Jauri College of Engineering and Computer Science Portland State University
participants (3)
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Abhijeet Joglekar -
Andrew Putra Jauri -
Cyrus Hall