[parsec-users] parsec on sparc patch (except ferret, facesim and vips)

Huan Fang huanf at kth.se
Mon Jul 14 05:36:37 EDT 2008


Hi All,

Yes, it's greatly constrained by cache/memory capacity. The speedup on a
4core Xeon machine(4096KB L2/core) is not bad. Very close to other
programs.

Huan

> Major,
>
> On real machines canneal will be seriously memory bound.
>
> - Chris
>
>
> -----Original Message-----
> From: parsec-users-bounces at lists.cs.princeton.edu
> [mailto:parsec-users-bounces at lists.cs.princeton.edu] On Behalf Of major
> Sent: Saturday, July 12, 2008 11:39 AM
> To: PARSEC Users
> Subject: Re: [parsec-users] parsec on sparc patch (except ferret, facesim
> and vips)
>
> No, I only ran the benchmark natively on the SUN SPARC machine, I did
> not use a simulator.
> The speedup is bad, half of what a perfectly scaling benchmark would
> achieve. I found similar results when run natively on an x86 machine.
>
>
> -Major
>
> Huan Fang wrote:
>> Hi Major,
>>
>> Do you use Simics for testing? How is the speedup look like? I am also
>> wondering why there is no memory model.
>>
>>
>> Huan
>>
>>> I tested canneal (via the provided patch) on a SPARC SUN Niagara 8-core
>>> machine and it exhibited horrible sub-linear speedups going from 1-8
>>> cores.
>>>
>>> Without modeling memory, probably avoiding the largest bottleneck for
>>> this benchmark.
>>>
>>> -Major
>>>
>>> Huan Fang wrote:
>>>
>>>> Hi Chiris B,
>>>>
>>>> Thank you as well. Actually I didn't run the patch provided by Chris
>>>> F,
>>>> but modified a few lines of atomic.h and AtomicPtr.h as the patch
>>>> does.
>>>> It
>>>> must have fixed the issue of alignment you mentioned before.
>>>>
>>>> The speedup test is achieved in Simics without any cache model(like
>>>> ruby).
>>>> I remember the Simics does not model cache hierarchies by default. My
>>>> guess is that this kind of simplification of Simics make it even
>>>> better
>>>> than real machines. However, canneal is the only one which has
>>>> superlinear
>>>> speedup I have found so far. I will keep finding the reason.
>>>>
>>>> Thanks again
>>>>
>>>> Regards,
>>>> Huan
>>>>
>>>>
>>>>
>>>>> Hi Huan,
>>>>>
>>>>> I'm not the Chris who submitted the patch, but I have an idea. (Chris
>>>>> F.
>>>>> from Cambridge submitted the patch. I'm Chris B.)
>>>>>
>>>>> The superlinear speedup is most likely caused by better cache
>>>>> efficiency.
>>>>> I
>>>>> haven't looked at the patch in enough detail, but canneal is severely
>>>>> memory
>>>>> bound. The slightest improvement here will make the program run a lot
>>>>> faster.
>>>>>
>>>>> Is your Solaris machine an SMP box? In that case the cache capacity
>>>>> grows
>>>>> linearly with the number of processors (as compared to a CMP, where
>>>>> it
>>>>> remains constant). That could be a reason for the improvement.
>>>>>
>>>>> - Chris
>>>>>
>>>>>
>>>>>
>>>>> -----Original Message-----
>>>>> From: parsec-users-bounces at lists.cs.princeton.edu
>>>>> [mailto:parsec-users-bounces at lists.cs.princeton.edu] On Behalf Of
>>>>> Huan
>>>>> Fang
>>>>> Sent: Tuesday, July 08, 2008 10:17 AM
>>>>> To: PARSEC Users
>>>>> Subject: Re: [parsec-users] parsec on sparc patch (except ferret,
>>>>> facesim
>>>>> and vips)
>>>>>
>>>>> Hi Chris,
>>>>>
>>>>>
>>>>> Many thanks to your patch, canneal can now run without any problems
>>>>> on
>>>>> solaris/sparc.
>>>>> The weird thing is I got a speedup even better than the ideal one.
>>>>> i.e.  4.6x  on 4cpus,
>>>>> 24.4x on 16cpus. I used Simics for simulation.
>>>>>
>>>>> Can anyone explain that?
>>>>>
>>>>> Regards,
>>>>> Huan
>>>>>
>>>>>
>>>>>> Hi all,
>>>>>>
>>>>>>    I compiled a patch that hopefully should allow you to compile
>>>>>> parsec
>>>>>> on
>>>>>>
>>>>>> a Sparc/Solaris 10 box. A few notes on my build environment: Solaris
>>>>>> 10
>>>>>> 5/08, gcc 4.2.3, and binutils 2.18. binutils 2.15 that ships with
>>>>>> Solaris
>>>>>> 10 have a funny version of AS, that refuses to compile perfectly
>>>>>> legal
>>>>>> opcodes and I think there was also an ld issue. The patch is
>>>>>> configured
>>>>>> to
>>>>>>
>>>>>> use parsec hooks with simics magic instructions.
>>>>>>
>>>>>> You can get the patch from:
>>>>>> http://www.cl.cam.ac.uk/~cf309/parsec_sparc.patch.bz2
>>>>>>
>>>>>> A few notes on the patch. I added a global definition
>>>>>> BIG_ENDIAN_MACHINE
>>>>>> to trigger endianess swap in affected benchmarks. No effort has been
>>>>>> made
>>>>>> to bind a thread to a particular CPU. As for dedup, the output is
>>>>>> saved
>>>>>> in
>>>>>>
>>>>>> big endian and as such different from output computed on an x86 box.
>>>>>> The
>>>>>> patch adds a configuration gcc-sparc, so you can use parsecmgmt to
>>>>>> compile
>>>>>>
>>>>>> the benchmarks as usual.
>>>>>>
>>>>>> As for the remaining benchmarks, I have vips and facesim running.
>>>>>> But...
>>>>>>
>>>>>> vips produces output that is too different to say that it is just an
>>>>>> endianess issue.
>>>>>>
>>>>>> facesim runs only if I use a really nasty hack. I don't feel
>>>>>> comfortable
>>>>>> of releasing this to public.
>>>>>>
>>>>>> as for ferret, I am still at a complete loss. It compiles, but then
>>>>>> just
>>>>>> hangs...
>>>>>>
>>>>>> If you have any questions feel free to contact me.
>>>>>>
>>>>>> Cheers
>>>>>>
>>>>>>    Chris
>>>>>> _______________________________________________
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>>>>>>
>>>>>>
>>>>>>
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-- 
MSc. System-on-Chip Design
Royal Institute of Technology (KTH), Stockholm, Sweden
Homepage: http://www.isk.kth.se/~huanf



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