[parsec-users] IPC Numbers

Wim Heirman wim.heirman at elis.ugent.be
Fri Dec 27 03:52:17 EST 2013


Jason,

These obviously depend highly on the specific architecture (ISA, pipeline depth, #resources, cache sizes, etc.). But if you just want to have a rough idea of e.g. which ones are memory bound, this page [1] can help which lists instruction and cycle counts for Parsec-2.1 (starting about halfway the page) on an Intel Nehalem.

Regards,
Wim

[1] http://snipersim.org/documents/gainestown-native.html


On 26 Dec 2013, at 23:09, Jason F <snorlaxgb at gmail.com> wrote:

> Does anyone have any sort of IPC numbers on PARSEC benchmarks (for Out of Order execution) , or where I could find them (not using ALPHA ISA)?
> 
> Please respond ASAP.
> 
> Getting this numbers with PIN is quite difficult. and M5 Out of Order is terrible
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