[talks] Jonathan Balkind will present his General Exam on May 7, 2015 at 10am in CS 301.
ngotsis at CS.Princeton.EDU
Thu Apr 30 14:41:33 EDT 2015
Jonathan Balkind will present his General Exam on May 7, 2015 at 10am in CS 301.
The members of his/her committee are David Wentzlaff (advisor), David Walker, and David August.
Everyone is invited to attend his talk, and those faculty wishing to remain for the oral exam following are welcome to do so. His abstract and reading list follow below.
Title: "META: The Multicore Effect-Tracking Architecture"
Modern processors from smartphones to servers are seeing higher core
counts in order to take advantage of increasing silicon area while
reducing the processors' overall energy consumption. Unfortunately,
parallelising code across general purpose cores generally imposes a
software overhead which makes only larger blocks of code worthwhile to
parallelise. With META, we make the observation that many functions only
read and write (or have effects) to a pre-defined subset of an
application's memory space. Based on this, we believe that architectural
awareness of functions' effects can provide a low-overhead mechanism for
parallelising existing code. META can enable the offload of fine-grain
functions such as memory copies and I/O operations which would otherwise
sit on the critical execution path of the main, energy intensive core.
With suitable programming language and operating system support, META can
bring higher level abstractions such as futures, callbacks, and work
queues to the hardware level, thus reducing OS and/or runtime overheads.
We evaluate the potential energy and performance improvements of META
using a software simulator and implement some of the hardware structures
in verilog RTL to determine the area requirements and complexity of the
Dynamic memory disambiguation using the memory conflict buffer. David M.
Gallagher, William Y. Chen, Scott A. Mahlke, John C. Gyllenhaal, and
Wen-mei W. Hwu. 1994. In Proceedings of the sixth international conference
on Architectural support for programming languages and operating systems
(ASPLOS VI). ACM, New York, NY, USA, 183-193. DOI=10.1145/195473.195534
Mondrian memory protection. Emmett Witchel, Josh Cates, and Krste
Asanović. 2002. In Proceedings of the 10th international conference on
Architectural support for programming languages and operating systems
(ASPLOS X). ACM, New York, NY, USA, 304-316. DOI=10.1145/605397.605429
Cilk: an efficient multithreaded runtime system. Robert D. Blumofe,
Christopher F. Joerg, Bradley C. Kuszmaul, Charles E. Leiserson, Keith H.
Randall, and Yuli Zhou. 1995. In Proceedings of the fifth ACM SIGPLAN
symposium on Principles and practice of parallel programming (PPOPP '95),
Richard L. Wexelblat (Ed.). ACM, New York, NY, USA, 207-216.
Transactional memory: architectural support for lock-free data structures.
Maurice Herlihy and J. Eliot B. Moss. 1993. In Proceedings of the 20th
annual international symposium on computer architecture (ISCA '93). ACM,
New York, NY, USA, 289-300. DOI=10.1145/165123.165164
The CHERI capability model: revisiting RISC in an age of risk. Jonathan
Woodruff, Robert N.M. Watson, David Chisnall, Simon W. Moore, Jonathan
Anderson, Brooks Davis, Ben Laurie, Peter G. Neumann, Robert Norton, and
Michael Roe. 2014. In Proceeding of the 41st annual international
symposium on Computer architecuture (ISCA '14). IEEE Press, Piscataway,
NJ, USA, 457-468.
Cyclone: A Safe Dialect of C, Trevor Jim, Greg Morrisett, Dan Grossman,
Michael Hicks, James Cheney, and Yanling Wang. USENIX Annual Technical
Conference, pages 275–288, Monterey, CA, June 2002.
Tagged Memory and Minion Cores in the lowRISC SoC. Alex Bradbury, Gavin
Ferris, and Robert Mullins. Memo. Computer Laboratory, University of
Cambridge, December 2014.
Idempotent processor architecture. Marc de Kruijf and Karthikeyan
Sankaralingam. 2011. In Proceedings of the 44th Annual IEEE/ACM
International Symposium on Microarchitecture (MICRO-44). ACM, New York,
NY, USA, 140-151. DOI=10.1145/2155620.2155637
A case for unlimited watchpoints. Joseph L. Greathouse, Hongyi Xin, Yixin
Luo, and Todd Austin. 2012. In Proceedings of the seventeenth
international conference on Architectural Support for Programming
Languages and Operating Systems (ASPLOS XVII). ACM, New York, NY, USA,
Dataflow execution of sequential imperative programs on multicore
architectures. Gagan Gupta and Gurindar S. Sohi. 2011. In Proceedings of
the 44th Annual IEEE/ACM International Symposium on Microarchitecture
(MICRO-44). ACM, New York, NY, USA, 59-70. DOI=10.1145/2155620.2155628
Task Superscalar: An Out-of-Order Task Pipeline. Yoav Etsion, Felipe
Cabarcas, Alejandro Rico, Alex Ramirez, Rosa M. Badia, Eduard Ayguade,
Jesus Labarta, and Mateo Valero. 2010. In Proceedings of the 2010 43rd
Annual IEEE/ACM International Symposium on Microarchitecture (MICRO '43).
IEEE Computer Society, Washington, DC, USA, 89-100.
A dependency-aware task-based programming environment for multi-core
architectures. Perez, J.M.; Badia, R.M.; Labarta, J., Cluster Computing,
2008 IEEE International Conference on , vol., no., pp.142,151, Sept. 29
2008-Oct. 1 2008. DOI=10.1109/CLUSTR.2008.4663765
More information about the talks