[talks] Naga Katta will present his Pre-FPO Thursday, March 24, 2016 at 10am in CS 402.

Nicki Gotsis ngotsis at CS.Princeton.EDU
Mon Mar 21 09:57:59 EDT 2016


Naga Katta will present his Pre-FPO Thursday, March 24, 2016 at 10am in CS 402.

The members of his committee are as follows: Jennifer Rexford (Adviser), Mike Freedman (Reader), Dave Walker (Reader), Nick Feamster (Non-reader) and Aarti Gupta (Non-reader).  

Everyone is invited to attend his talk.  The talk title and abstract follow below:

Title: Building reliable and efficient software-defined networks

Abstract:
Software-defined networking (SDN) promises flexible network control by enforcing fine-grained policies in the dataplane through a centralized controller. However, despite this promise, operators accustomed to fast and fault-tolerant routing using traditional protocols find two important properties lacking in SDNs - efficiency and reliability. In particular, they face the following problems while deploying SDN - One, the control plane timescales are too slow to enforce fault-tolerant load balancing in order to efficiently use the available network capacity. Second, the commodity SDN switches have limited space to enforce fine-grained policy rules which undermines the promise of flexible control. Third, the centralized controller itself is a single point of failure which is unacceptable for operators used to running distributed fault-tolerant network protocols.

My thesis aims to mitigate these problems using novel algorithms that exploit advanced data plane capabilities and enhancements to the control plane software. At the same time, we also provide simple abstractions on top of these systems so that network operators writing control programs need not worry about low-level details of how these problems are dealt with.

First, I will present HULA, which gives the abstraction of one big efficient non-blocking switch. Instead of asking the control plane to choose the best path for each new flow, HULA efficiently routes traffic on least congested paths in the dataplane. HULA uses advanced hardware data plane capabilities to infer global congestion information and uses that information to do fine-grained load balancing at RTT timescales. HULA is congestion-aware, scales to large topologies and is robust to topology failures. 

Second, I will present CacheFlow which helps enforcing fine-grained policies by proposing the abstraction of a switch with logically infinite rule space. CacheFlow uses a combination of software and hardware data paths to bring the best of both worlds to policy enforcement. By dynamically caching a small number of heavy hitting rules in the hardware switch and the rest of the rules in the software data path, it achieves both high throughput and high rule capacity. Since cross-rule dependencies make rule caching difficult, CacheFlow uses novel algorithms to do dependency-aware, efficient and transparent rule caching.

Finally, I will present Ravana which gives the abstraction of one logically centralized controller. Given this abstraction, the network operator only writes programs for one controller and the Ravana runtime takes care of replicating the control logic for fault-tolerance. Since network switches carry additional state external to the controller state, Ravana uses an enhanced version of traditional replicated state machine protocols to ensure ordered and exactly-once execution of network events. 

Together these systems propose a new architecture where basic routing is done efficiently at dataplane timescales, policy enforcement is done scalably with the help of software data planes and the control plane is fault-tolerant. This new architecture has the properties of fast routing and fault-tolerance of traditional networks while delivering the promise of efficient enforcement of fine-grained control policies.


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