Hi,
My work is on IXP1240.
Which code are you trying, is it "L3Fw8_1f.ue"?
It's code I've personally written in microC.
For my case, I try to aggregate packet from FE port to GE port, and I have
modified the reciving part of the FE code to transmit packet to GE port. Recently, I got a email regarding this problem, and it he said that it is due to the coordination issue in the TFIFO. Do you have any ideal on this issue?
As what I suspect, it may be cause by the HW at the TFIFO. Hope we can help each other in solving this problem.
Fortunately I've found the error during the weekend. I was also beginning to think there is something wrong with the hw. :-) In my case the error was this one : I was transferring mpkts from sdram to tfifo in bunches of 4 mpkts, or 2 mpkts or 1 depending on the size of the packet to be transferred. In the case of 4 and 2 I was using the sdram command configured to transfer 16 quadwords to tfifo. However, I was not checking whether the target fifo elefent was the last one, and therefore I should wrap around the transfer of the seconf mpkt to the first element of the tfifo. As a result, half of the data were sometimes lost. That was the reason of the periodic error behavior as well as the fact that it was seen more often on big packets. The code is more or less a mess right now, and surely needs improvement and more debuging. I plan to put it on my web page soon... :-) During the whole process I realized that it is not so easy to coordinate everything so as not to hit the bottom (underrun) and still perform all the checks per mpkt (check xmit_ptr, check ready_port bit, etc). Moreover, while on the simulation you may get normal behavior, on the real hardware you may experience unexpected errors mainly due to synchronization/timing issues. In any way, if you want to give it a try now (the code does nothing more than transmitting a single packet) or in a few days (will be able to transmit from a queue of packets) tell me so. Yannis Haritakis
Mike Wong Kim Sing R&D Engineer Institute for Communications Research 20 Science Park Road TeleTech Park #02-34/37 Singapore Science Park II Singapore 117674 Tel: 65 68729030 DID : 65 68709320 Fax: 65 67795441 Email: wongks@icr.a-star.edu.sg Website: http://www.icr.a-star.edu.sg
haritak@ics.forth.gr 06/23/03 08:00 AM >>>
I am facing exactly the same problem and I haven't found a solution yet.
I am working on ENP-2506.
In my case the problem is :
I move some data to SDRAM (one packet) and then I transmit it several times.
What I observe is that some replicas of the packet are xmited fine, while sometimes bits are missing resulting in a smaller packet.
The "phenomenon" seems quite periodic: 4 packets received fine, one packet reduced by 63Bytes, 4 packets received fine, one packet reduced by 103Bytes, 4 packets received fine, one packet reduced by 63Bytes, ...
The bigger the packet (>15 MPKTs) the more frequent the errors. Smaller packets seem to be fine, however for 8MPKTS still I received one erroneous after some transmissions.
I suspect there might be a chance of overflowding the xmit buffer on the port. However, the problem persisted even when the microCode was programmed to xmit only one packet and I was uploading it many times manually in order to produce replicas of the packet.
But I am still working on that. So any (debugging) ideas are welcome.
Thanks a lot for your time! Yannis Haritakis
On Tue, 27 May 2003, Wong Kim Sing wrote:
Hi,
I had this problem of receiving error packet from the giga port, here is how the test go.
I had created some packets in the microengine, e.g.
move($$dxfer0, 0xfffffff1) move($$dxfer1, 0xfffffff3) move($$dxfer2, 0xfffffff5) move($$dxfer3, 0xfffffff7) move($$dxfer4, 0xfffffff9) move($$dxfer5, 0xfffffffb) move($$dxfer6, 0xfffffffd) move($$dxfer7, 0xffffffff)
sdram[write, $$dxfer0, packet_buf_addr, 0, 4], ctx_swap
move($$dxfer0, 0xfffffff1) move($$dxfer1, 0xfffffff3) move($$dxfer2, 0xfffffff5) move($$dxfer3, 0xfffffff7) move($$dxfer4, 0xfffffff9) move($$dxfer5, 0xfffffffb) move($$dxfer6, 0xfffffffd) move($$dxfer7, 0xffffffff)
sdram[write, $$dxfer0, packet_buf_addr, 4, 4], ctx_swap
And I send out this packet to the giga port using the "L3fw8_1.uc" microcode from intel reference design.
Result obtained as below:
19:21:03.445227 ff:f0:ff:ff:ff:f1 ff:ff:ff:f1:ff:ff ffff 116:
fff2 ffff fff5 ffff fff4 ffff fff5 ffff fff6 ffff fff9 ffff fff8 ffff fff9 ffff fffa ffff fffd ffff fffc ffff fffd ffff fffe ffff fff1 ffff fff0 ffff fff1 ffff fff2 ffff fff5 ffff fff4 ffff fff5 ffff fff6
On the first row and the fifth row, it should be "fff3" and "fff5" respectively, but it become "fff2" and "fff4", there is one bit being modified.
And also from 2nd row onward,there is some duplication occur, the 2 words "ffff fff5" has been repeated two time in row 4 and row 6.
Is there anyone has this similar problem before or do you have any ideal of solving this, please send a email, thank you.
Mike Wong Kim Sing R&D Engineer Institute for Communications Research 20 Science Park Road TeleTech Park #02-34/37 Singapore Science Park II Singapore 117674 Tel: 65 68729030 DID : 65 68709320 Fax: 65 67795441 Email: wongks@i2r.a-star.edu.sg Website: http://www.i2r.a-star.edu.sg