Speaker: Arjuna Madanayake, Florida International University Day: October 10, 2024 Time: 4:30pm Location: B205 Engineering Quadrangle Hosts: Yasaman Ghasempour and Kaushik Sengupta Event Page: [ https://ece.princeton.edu/events/spectre-signal-processing-efficient-compute... | https://ece.princeton.edu/events/spectre-signal-processing-efficient-compute... ] Title: SPECTRE: Signal Processing with Efficient Compute for Transmit and Receive Environments Abstract: Wideband radio frequency (RF) array processors form an integral building block of modern wireless communications, location, sensing, and electronic warfare systems. There is interest in multifunctional and frequency agile antenna arrays with fully digital beam processing and machine learning (ML) algorithms at the backend that operate across a wide span of frequencies starting from VHF/UHF up to mm-waves and even sub-THz ranges. Digital signal processing (DSP) across massive bandwidths – today up to about 30 GHz for some sub-THz applications – requires careful consideration of multiple design constraints. Most array DSP operations consist of typical functions, such as discrete Fourier transforms (DFTs), finite impulse response (FIR) filters, cross-correlators, multiply-accumulators, and linear algebra (LA) functions like matrix inversion. Arithmetic complexity of basic DSP algorithms must be carefully factored into their design. A classic example is the use of sparse matrix factorizations on the DFT matrix leading to the suite of fast algorithms known as Fast Fourier Transforms (FFTs) of which the most famous is the Cooley-Tukey FFT invented at Princeton and IBM. The claim to fame for the FFT is its enormously useful factorizations having low arithmetic complexity at O(N log2 N), which is tiny compared to the case of the DFT. The DFT is computed brute-force at arithmetic complexity O(N2) where N is the number of points used. The theoretical lower bounds of DFT complexity have been rigorously proven decades in the past by Heideman and Burrus. Luckily, we can get around these bounds via a sequence of approximations. We achieve O(N) complexity for FFT-like operations by recognizing how real-world RF systems have multiple sources of error. The theoretical complexity bounds of the DFT could be circumvented by computing judiciously tailored low-complexity DFT matrix approximations capable of closely preserving mathematical properties of the exact DFT. In this talk, we discuss the use of approximate DFTs (ADFT) with corresponding sparse factorizations that are free of multiplications. The author and his collaborator RJ Cintra have developed an approach for superfast wideband RF signal processing for FFT applications, including multi-beam spacetime orthogonal beamforming, orthogonal frequency division multiplexing (OFDM) and maximally-decimated uniform-DFT polyphase FIR filterbanks, that replace O(N log2 N) FFTs of Cooley-Tukey fame with factorized ADFTs that are within 2 dB of performance of exact DFT but show much lower arithmetic complexity at just O(N). This extra log2 N reduction beyond what is possible from FFTs – which of course comes at a small price – has massive benefits in both chip area and power consumption for many wideband RF systems. In this talk, the author discusses our recent DARPA, ONR, and NSF funded research activities surrounding low-complexity low-power DSP for real-world RF multi-beam beamforming, low-SWaP spatio-temporal multidimensional spectrum sensing, and low-complexity adaptive digital null-forming using Howells-Applebaum adaptive arrays that make use of the O(N) ADFTs. The talk covers the basic mathematical theory, algorithms, RF/microwave systems, digital compute and FPGA/RF-SoC and chiplet based CMOS realizations underway at Florida International University. Bio: Arjuna Madanayake is an Associate Professor of Electrical and Computer Engineering at Florida International University (FIU), Miami, Florida. He runs the RAND Lab which has 15 PhD students at present. His area of specialization is multidimensional systems and signal processing. Dr. Madanayake’s wider research interests span one- and multi-dimensional signal processing and filter design (both analog and digital), RF/microwave systems, analog-CMOS and analog computer architecture, digital systems and FPGA/RF-SoC systems, fast algorithms and digital ASIC, digital hardware based ``software defined’’ radios, electromagnetics and sub-THz nearfield processing, wireless communications, 5G/6G and mm-wave systems, spectrum, RF artificial intelligence and machine learning (AI/ML) and semiconductor technologies.