Jordan Fix will present his Pre-FPO on Monday, November 7th, 2016 at 4pm in CS 401
Jordan Fix will present his Pre-FPO on Monday, November 7th, 2016 at 4pm in CS 401. The members of his committee are: Advisor: David August Non-readers: David Wentzlaff, Margaret Martonosi Readers: Andrew Appel, David Callahan (Facebook) Everyone is invited to attend his talk. Abstract: Speculation with transactional memory (TM) systems helps programmers and compilers produce profitable thread-level parallel programs. Prior work shows that supporting transactions that span multiple threads, rather than requiring transactions be contained within a single thread, enables new types of speculative parallelization techniques for both programmers and parallelizing compilers. The only prior TM systems with this multithreaded transactional (MTX) support are software-based TM (STM) systems. Unfortunately, these systems are notorious for their high overheads when validating speculative memory operations, which often make otherwise good parallelization unprofitable. Thus, parallelized programs using these prior STM systems with MTX support were forced to overcome this problem through significant manual effort by the programmer to optimize away most of this speculation validation. Unfortunately, compiler technology and static analyses have not proven strong enough to relieve the programmer of this burden. This thesis presents the first complete design and implementation of a hardware TM (HTM) system with MTX support. This system provides low overhead speculation validation, enabling the aforementioned new types of speculative parallelization techniques to achieve good performance even with high amounts of speculation validation. Profitable parallelization of complex programs can be achieved even with maximal speculation validation of every load and store inside transactions of tens to hundreds of millions of instructions, thus making parallelization less laborious and more feasible for both programmers and compilers. In addition to supporting MTXs, transactions in this system are more resilient than in many other prior works. Transactions avoid false misspeculation due to branch misprediction; provide for large read and write sets that commit in a lazy fashion; and allow for context switches (and thread migration) due to common operations such as preemption or virtual memory management. This allows the system to accommodate the large and long running transactions that are needed to parallelize complex programs. Across 6 SPEC benchmarks a geomean speedup of 2.11X over sequential execution is achieved on a multicore machine with 4 cores, while increasing energy usage by 10%.
Please note a change in time. Jordan Fix will present his Pre-FPO on Monday, November 7th, 2016 at 3pm in CS 401. The members of his committee are: Advisor: David August Non-readers: David Wentzlaff, Margaret Martonosi Readers: Andrew Appel, David Callahan (Facebook) Everyone is invited to attend his talk. Abstract: Speculation with transactional memory (TM) systems helps programmers and compilers produce profitable thread-level parallel programs. Prior work shows that supporting transactions that span multiple threads, rather than requiring transactions be contained within a single thread, enables new types of speculative parallelization techniques for both programmers and parallelizing compilers. The only prior TM systems with this multithreaded transactional (MTX) support are software-based TM (STM) systems. Unfortunately, these systems are notorious for their high overheads when validating speculative memory operations, which often make otherwise good parallelization unprofitable. Thus, parallelized programs using these prior STM systems with MTX support were forced to overcome this problem through significant manual effort by the programmer to optimize away most of this speculation validation. Unfortunately, compiler technology and static analyses have not proven strong enough to relieve the programmer of this burden. This thesis presents the first complete design and implementation of a hardware TM (HTM) system with MTX support. This system provides low overhead speculation validation, enabling the aforementioned new types of speculative parallelization techniques to achieve good performance even with high amounts of speculation validation. Profitable parallelization of complex programs can be achieved even with maximal speculation validation of every load and store inside transactions of tens to hundreds of millions of instructions, thus making parallelization less laborious and more feasible for both programmers and compilers. In addition to supporting MTXs, transactions in this system are more resilient than in many other prior works. Transactions avoid false misspeculation due to branch misprediction; provide for large read and write sets that commit in a lazy fashion; and allow for context switches (and thread migration) due to common operations such as preemption or virtual memory management. This allows the system to accommodate the large and long running transactions that are needed to parallelize complex programs. Across 6 SPEC benchmarks a geomean speedup of 2.11X over sequential execution is achieved on a multicore machine with 4 cores, while increasing energy usage by 10%.
participants (1)
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Nicki Gotsis