[ixp1200] 1K or 2K instruction cache?

Johnson, Erik J erik.j.johnson at intel.com
Mon Mar 15 11:40:14 EST 2004


Yes, for the assembler one must insert the unconditional branches across
the 1K boundary.  For microC, I believe the compiler will only insert
such branches at function boundaries.  So, if you are forcing all of
your functions to be inlined, main() may become larger than 1K
instructions.  I have had this problem before and the simple fix is to
not inline one or more routines to allow the compiler to place them in a
different segment from the "scope" of main().

erik 

-----Original Message-----
From: ixp1200-bounces at lists.cs.princeton.edu
[mailto:ixp1200-bounces at lists.cs.princeton.edu] On Behalf Of Elsenbeck,
Jim
Sent: Monday, March 15, 2004 8:34 AM
To: 'IXP1200 Developer's List'
Subject: RE: [ixp1200] 1K or 2K instruction cache?

If you have the version of 1200 that contains 2k of instruction memory
you can have upto 2k of instructions.  But the instructions are stored
in two separate 1k areas and you need to branch between the two areas.

-----Original Message-----
From: Tim Stevens [mailto:tim.stevens at intec.ugent.be]
Sent: Monday, March 15, 2004 11:28 AM
To: ixp1200 at lists.cs.princeton.edu
Subject: [ixp1200] 1K or 2K instruction cache?


Hi all,

We use a RadiSys ENP-2505 board and encounter a problem concerning the 
microengine instruction cache size.
Each time we compile the code, the compiler complains that it doesn't
fit 
into the instruction memory (total size between 1K and 2K instructions),

while our RadiSys documentation states that we have a 2K instruction
cache...
Does this mean that we have to set a specific compiler flag, or is one 
instruction larger than one unit in the instruction cache (meaning that
a 
2K cache can only hold about 1K instructions)?

Any help would be appreciated.

Kind regards,

Tim

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