[talks] Elba Garza will present her Generals on Monday, January 19, 2015 at 8:30 am in Rm 401

[Nicki Gotsis]

Elba Garza will present her Generals on Monday, January 19, 2015 at 8:30 am in Rm 401.

The members of her committee are David August, Margaret Martonosi, Kelly Shaw (University of Richmond).

Everyone is invited to attend her talk, and those faculty wishing to remain for the oral exam following are welcome to do so.  His/her abstract and reading list follow below.


Abstract
The emerging popularity of heterogeneous architectures results in a necessary
and complex selection of runtime hardware/software parameters. As these heterogeneous
systems have grown to offload computation to graphics processing
units (GPUs), various Application-specific integrated circuits (ASICs) and other
compute units, there is a higher need to optimize these units’ software and hardware
settings to reach better power, performance, and area goals. Exhaustive exploration
techniques are impractical since the design spaces grow exponentially
with the addition of new parameters. Design spaces can easily reach thousands
or millions of configurations to simulate or test. Manual and inference-based
information can be flawed due to individual knowledge and bias, which may lead
to unsearched design areas. Using statistical learning techniques, we have been
able to optimize design space exploration for parameters of heterogeneous architecture
components such as GPUs and Accelerator ASICs. These techniques
allow for efficient and tractable design space assessment and can output optimal
or near-optimal parameter settings for given applications automatically.


Reading List
[Cas+10] C. Cascaval et al. “A taxonomy of accelerator architectures and
their programming models”. In: IBM Journal of Research and Development
54.5 (Sept. 2010), 5:1–5:10. issn: 0018-8646. doi: 10.
1147/JRD.2010.2059721.
[Con+14] Jason Cong et al. “Accelerator-Rich Architectures: Opportunities
and Progresses”. In: Proceedings of the 51st Annual Design Automation
Conference. DAC ’14. San Francisco, CA, USA: ACM, 2014,
180:1–180:6. isbn: 978-1-4503-2730-5. doi: 10 . 1145 / 2593069 .
2596667. url: http://doi.acm.org/10.1145/2593069.2596667.
[Esm+11] Hadi Esmaeilzadeh et al. “Dark Silicon and the End of Multicore
Scaling”. In: Proceedings of the 38th Annual International Symposium
on Computer Architecture. ISCA ’11. San Jose, California,
USA: ACM, 2011, pp. 365–376. isbn: 978-1-4503-0472-6. doi: 10.
1145/2000064.2000108. url: http://doi.acm.org/10.1145/
2000064.2000108.
[Lyo+12] Michael J. Lyons et al. “The Accelerator Store: A Shared Memory
Framework for Accelerator-based Systems”. In: ACM Trans. Archit.
Code Optim. 8.4 (Jan. 2012), 48:1–48:22. issn: 1544-3566. doi: 10.
1145/2086696.2086727. url: http://doi.acm.org/10.1145/
2086696.2086727.
[Sha+14] Yakun Sophia Shao et al. “Aladdin: A Pre-RTL, Power-performance
Accelerator Simulator Enabling Large Design Space Exploration of
Customized Architectures”. In: Proceeding of the 41st Annual International
Symposium on Computer Architecuture. ISCA ’14. Minneapolis,
Minnesota, USA: IEEE Press, 2014, pp. 97–108. isbn:
1lba Garza January 19, 2015
978-1-4799-4394-4. url: http://dl.acm.org/citation.cfm?id=
2665671.2665689.
[Ham+10] Rehan Hameed et al. “Understanding Sources of Inefficiency in
General-purpose Chips”. In: Proceedings of the 37th Annual International
Symposium on Computer Architecture. ISCA ’10. SaintMalo,
France: ACM, 2010, pp. 37–47. isbn: 978-1-4503-0053-7. doi:
10.1145/1815961.1815968. url: http://doi.acm.org/10.1145/
1815961.1815968.
[JSM12] Wenhao Jia, Kelly A. Shaw, and Margaret Martonosi. “Stargazer:
Automated Regression-based GPU Design Space Exploration”. In:
Proceedings of the 2012 IEEE International Symposium on Performance
Analysis of Systems & Software. ISPASS ’12. Washington,
DC, USA: IEEE Computer Society, 2012, pp. 2–13. isbn: 978-1-
4673-1143-4. doi: 10 . 1109 / ISPASS . 2012 . 6189201. url: http :
//dx.doi.org/10.1109/ISPASS.2012.6189201.
[JSM13] Wenhao Jia, Kelly A. Shaw, and Margaret Martonosi. “Starchart:
Hardware and Software Optimization Using Recursive Partitioning
Regression Trees”. In: Proceedings of the 22nd International
Conference on Parallel Architectures and Compilation Techniques.
PACT ’13. Edinburgh, Scotland, UK: IEEE Press, 2013, pp. 257–
268. isbn: 978-1-4799-1021-2. url: http://dl.acm.org/citation.
cfm?id=2523721.2523757.
[JVT06a] P. J. Joseph, K. Vaswani, and Matthew J. Thazhuthaveetil. “Construction
and use of linear regression models for processor performance
analysis”. In: High-Performance Computer Architecture,
2006. The Twelfth International Symposium on. Feb. 2006, pp. 99–
108. doi: 10.1109/HPCA.2006.1598116.
[JVT06b] P. J. Joseph, Kapil Vaswani, and Matthew J. Thazhuthaveetil. “A
Predictive Performance Model for Superscalar Processors”. In: Proceedings
of the 39th Annual IEEE/ACM International Symposium
on Microarchitecture. MICRO 39. Washington, DC, USA: IEEE
Computer Society, 2006, pp. 161–170. isbn: 0-7695-2732-9. doi:
10.1109/MICRO.2006.6. url: http://dx.doi.org/10.1109/
MICRO.2006.6.
[LB06] Benjamin C. Lee and David M. Brooks. “Accurate and Efficient
Regression Modeling for Microarchitectural Performance and Power
Prediction”. In: SIGPLAN Not. 41.11 (Oct. 2006), pp. 185–194.
issn: 0362-1340. doi: 10 . 1145 / 1168918 . 1168881. url: http :
//doi.acm.org/10.1145/1168918.1168881.
2lba Garza January 19, 2015
Book List
[HP12] J.L. Hennessy and D.A. Patterson. Computer Architecture: A Quantitative
Approach. Morgan Kaufmann. Morgan Kaufmann/Elsevier,
2012. isbn: 9780123838728.



Nicki Gotsis
Graduate Coordinator
Room 310, Computer Science
(609) 258-5387
ngotsis at cs.princeton.edu