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Machine Learning Seminar: Prof. Ramya Korlakai Vinayak visiting on Friday, Oct 4th
by Emily C. Lawrence 03 Oct '24

03 Oct '24

Machine Learning Seminar Prof. Ramya Korlakai Vinayak from UW-Madison is visiting this Friday, Oct 4th from 11:00 am -12:00 pm at Friend Center 008. Title: Towards Pluralistic Alignment: Foundations for Learning from Diverse Human Preferences Abstract: Large pre-trained models trained on internet-scale data are often not ready for safe deployment out-of-the-box. They are heavily fine-tuned and aligned using large quantities of human preference data, usually elicited using pairwise comparisons. While aligning an AI/ML model to human preferences or values, it is important to ask whose preference and values we are aligning it to ? The current approaches of alignment are severely limited due to their inherent uniformity assumption. While there is rich literature on learning preferences from human judgements using comparison queries, the models often focus on learning average preference over the population due to the limitations on the amount of data available per individual or on learning an individual's preference using a lot of queries. Furthermore, the knowledge of the metric, i.e., the way humans judge similarity and dissimilarity, is assumed to be known which does not hold in practice. We aim to overcome these limitations by building mathematical foundations for learning from diverse human preferences. In this talk, I will present, PAL, a personalize-able reward modelling framework for pluralistic alignment, which captures diversity in preferences while also capturing commonalities that can be learned by pooling together data from individuals. I will also discuss some recent theoretical results on per user sample complexity for generalization and fundamental limitations when there are limited pairwise comparisons. Based on work with Daiwei Chen, Yi Chen, Aniket Rege, Zhi Wang, Geelon So, Greg Canal, Blake Mason, Gokcan Tatli, and Rob Nowak. References: 1. [ https://arxiv.org/pdf/2406.08469 | PAL: Pluralistic Alignment Framework for learning from heterogeneous preferences ] (preprint, 2024) 2. [ https://arxiv.org/abs/2207.03609 | One-for-all: Simultaneous metric and preference learning ] (appeared in Neurips 2022) 3. [ https://arxiv.org/pdf/2403.19629 | Metric learning via limited pairwise comparisons ] (appeared in UAI 2024), and 4. [ https://proceedings.mlr.press/v238/tatli24a.html | Learning Populations of Preferences via pairwise comparisons ] (appeared in AISTATS 2024). Bio: Ramya Korlakai Vinayak is the Dugald C. Jackson assistant professor in the Dept. of ECE and affiliated faculty in the Dept. of Computer Science and the Dept. of Statistics at the UW-Madison. Her research interests span the areas of machine learning, statistical inference, and crowdsourcing, with a focus on preference learning and alignment under heterogeneity, reliable and efficient dataset creation, and human-in-the-loop systems. Her works aim to address theoretical and practical challenges that arise when learning from heterogeneous societal data. Prior to joining UW-Madison, Ramya was a postdoctoral researcher in the Paul G. Allen School of Computer Science and Engineering at the University of Washington. She received her Ph.D. in Electrical Engineering from Caltech. She obtained her Masters from Caltech and Bachelors from IIT Madras. She is a recipient of the Schlumberger Foundation Faculty of the Future fellowship from 2013-15, and an invited participant at the Rising Stars in EECS workshop in 2019. She is the recipient of NSF CAREER Award in 2023.

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NextG Distinguished Seminar Series: Thursday Oct. 10 at 4:30 pm
by Emily C. Lawrence 03 Oct '24

03 Oct '24

Speaker: Arjuna Madanayake, Florida International University Day: October 10, 2024 Time: 4:30pm Location: B205 Engineering Quadrangle Hosts: Yasaman Ghasempour and Kaushik Sengupta Event Page: [ https://ece.princeton.edu/events/spectre-signal-processing-efficient-comput… | https://ece.princeton.edu/events/spectre-signal-processing-efficient-comput… ] Title: SPECTRE: Signal Processing with Efficient Compute for Transmit and Receive Environments Abstract: Wideband radio frequency (RF) array processors form an integral building block of modern wireless communications, location, sensing, and electronic warfare systems. There is interest in multifunctional and frequency agile antenna arrays with fully digital beam processing and machine learning (ML) algorithms at the backend that operate across a wide span of frequencies starting from VHF/UHF up to mm-waves and even sub-THz ranges. Digital signal processing (DSP) across massive bandwidths – today up to about 30 GHz for some sub-THz applications – requires careful consideration of multiple design constraints. Most array DSP operations consist of typical functions, such as discrete Fourier transforms (DFTs), finite impulse response (FIR) filters, cross-correlators, multiply-accumulators, and linear algebra (LA) functions like matrix inversion. Arithmetic complexity of basic DSP algorithms must be carefully factored into their design. A classic example is the use of sparse matrix factorizations on the DFT matrix leading to the suite of fast algorithms known as Fast Fourier Transforms (FFTs) of which the most famous is the Cooley-Tukey FFT invented at Princeton and IBM. The claim to fame for the FFT is its enormously useful factorizations having low arithmetic complexity at O(N log2 N), which is tiny compared to the case of the DFT. The DFT is computed brute-force at arithmetic complexity O(N2) where N is the number of points used. The theoretical lower bounds of DFT complexity have been rigorously proven decades in the past by Heideman and Burrus. Luckily, we can get around these bounds via a sequence of approximations. We achieve O(N) complexity for FFT-like operations by recognizing how real-world RF systems have multiple sources of error. The theoretical complexity bounds of the DFT could be circumvented by computing judiciously tailored low-complexity DFT matrix approximations capable of closely preserving mathematical properties of the exact DFT. In this talk, we discuss the use of approximate DFTs (ADFT) with corresponding sparse factorizations that are free of multiplications. The author and his collaborator RJ Cintra have developed an approach for superfast wideband RF signal processing for FFT applications, including multi-beam spacetime orthogonal beamforming, orthogonal frequency division multiplexing (OFDM) and maximally-decimated uniform-DFT polyphase FIR filterbanks, that replace O(N log2 N) FFTs of Cooley-Tukey fame with factorized ADFTs that are within 2 dB of performance of exact DFT but show much lower arithmetic complexity at just O(N). This extra log2 N reduction beyond what is possible from FFTs – which of course comes at a small price – has massive benefits in both chip area and power consumption for many wideband RF systems. In this talk, the author discusses our recent DARPA, ONR, and NSF funded research activities surrounding low-complexity low-power DSP for real-world RF multi-beam beamforming, low-SWaP spatio-temporal multidimensional spectrum sensing, and low-complexity adaptive digital null-forming using Howells-Applebaum adaptive arrays that make use of the O(N) ADFTs. The talk covers the basic mathematical theory, algorithms, RF/microwave systems, digital compute and FPGA/RF-SoC and chiplet based CMOS realizations underway at Florida International University. Bio: Arjuna Madanayake is an Associate Professor of Electrical and Computer Engineering at Florida International University (FIU), Miami, Florida. He runs the RAND Lab which has 15 PhD students at present. His area of specialization is multidimensional systems and signal processing. Dr. Madanayake’s wider research interests span one- and multi-dimensional signal processing and filter design (both analog and digital), RF/microwave systems, analog-CMOS and analog computer architecture, digital systems and FPGA/RF-SoC systems, fast algorithms and digital ASIC, digital hardware based ``software defined’’ radios, electromagnetics and sub-THz nearfield processing, wireless communications, 5G/6G and mm-wave systems, spectrum, RF artificial intelligence and machine learning (AI/ML) and semiconductor technologies.

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Liyi Zhang will present his General Exam "Explaining Distributed Representations by Deep Neural Networks with Bayesian Inference" on Friday, October 4, 2024 at 10:00 AM in Friend Center 005 and via zoom.
by CS Grad Department 01 Oct '24

01 Oct '24

Liyi Zhang will present his General Exam " Explaining Distributed Representations by Deep Neural Networks with Bayesian Inference " on Friday, October 4, 2024 at 10:00 AM in Friend Center 005 and via zoom. Zoom link: https://princeton.zoom.us/j/9603487644 Committee Members: Tom Griffiths (advisor), Ryan Adams , Danqi Chen Abstract: Human-like intelligence in machines has been of interest to philosophers and engineers for centuries. Today’s deep learning allows computational models to obtain meaningful representations on high-dimensional inputs such as text and images. However, understanding these representations is challenging and why they work remains opaque. Our aim goes in two directions: 1) using computational foundations of human cognition to understand and to improve deep neural networks; 2) reverse-engineering the mind by using success in deep neural networks to understand human cognitive processes. In both directions, Bayesian inference serves as a bridge between the two fields. In the first goal, we present a Bayesian interpretation of the autoregressive objective under several distributional assumptions to show where the optimal content of language model embeddings can be identified. In the second goal, we show how variants of prior distributions in variational auto-encoders, a probabilistic generative model, explain how forming prototypes contributes to semi-supervised categorization. Reading List: https://docs.google.com/document/d/13_DPdcPTKklMbzzabiUXY7q-BiLmjnBJGoPZvge… Everyone is invited to attend the talk, and those faculty wishing to remain for the oral exam following are welcome to do so.

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DeCenter Seminar: Oct 2 at 4:30pm
by Emily C. Lawrence 30 Sep '24

30 Sep '24

This upcoming Wednesday, October 2nd, at 4:30 PM, the DeCenter Seminar Series continues with [ https://www.linkedin.com/in/joseph-bonneau-15419920/ | Joseph Bonneau ] , Assistant Professor of Computer Science at New York University and Research Partner at a16z crypto. He will present a seminar titled "Towards Cryptographically Verifiable Randomness." The event will take place in the Friend Center Convocation Room (113). Abstract: Public randomness has many important applications, from games and state lotteries to allocation of visas and public housing or assignment of judges to legal cases. Yet today, most of these applications provide little or no public verifiability. This talk will survey nearly ten years of work by the author on using cryptography to generate publicly verifiable randomness, including the development of verifiable delay functions and modern randomness beacon protocols based on them. It will also discuss the practical challenges in bringing these protocols into common use. Bio: Joseph Bonneau is an Assistant Professor of Computer Science at New York University and a Research Partner at a16z crypto. His research focuses on applied cryptography and computer security. He earned BS and MS degrees from Stanford University and completed his PhD at the University of Cambridge, all studying computer science. Prior to joining NYU he was a postdoctoral fellow at Princeton’s Center for Information Technology Policy as well as at Stanford and the Electronic Frontier Foundation. We Hope to see you there!

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CS Colloquium Speakers: week of March 4
by Emily C. Lawrence 30 Sep '24

30 Sep '24

CS Colloquium Speakers Speaker: Sewon Min, University of Washington Date: Monday, March 4 Time: 12:30pm EST Location: CS 105 Host: Danqi Chen Event page: https://www.cs.princeton.edu/events/26579 Register for live-stream online here: https://princeton.zoom.us/webinar/register/WN_5uVGEpXNTVe8eBNSLpxKtg Title: Rethinking Data Use in Large Language Models Abstract: Large language models (LMs) such as ChatGPT have revolutionized natural language processing and artificial intelligence more broadly. In this talk, I will discuss my research on understanding and advancing these models, centered around how they use the very large text corpora they are trained on. First, I will describe our efforts to understand how these models learn to perform new tasks after training, demonstrating that their so-called in context learning capabilities are almost entirely determined by what they learn from the training data. Next, I will introduce a new class of LMs—nonparametric LMs—that repurpose this training data as a data store from which they retrieve information for improved accuracy and updatability. I will describe my work on establishing the foundations of such models, including one of the first broadly used neural retrieval models and an approach that simplifies a traditional, two-stage pipeline into one. I will also discuss how nonparametric models open up new avenues for responsible data use, e.g., by segregating permissive and copyrighted text and using them differently. Finally, I will envision the next generation of LMs we should build, focusing on efficient scaling, improved factuality, and decentralization. Bio: Sewon Min is a Ph.D. candidate in the Paul G. Allen School of Computer Science & Engineering at the University of Washington. Her research focuses on language models (LMs): studying the science of LMs, and designing new model classes and learning methods that make LMs more performant and flexible. She also studies LMs in information-seeking, legal, and privacy contexts. She is a co-organizer of multiple tutorials and workshops, including most recently at ACL 2023 on Retrieval-based Language Models and Applications and upcoming at ICLR 2024 on Mathematical and Empirical Understanding of Foundation Models. She won a paper award at ACL 2023, received a J.P. Morgan Fellowship, and was named an EECS rising star in 2022. Speaker: Lianmin Zheng, University of California, Berkeley Date: Tuesday, March 5 Time: 12:30pm EST Location: CS 105 Host: Ravi Netravali Event page: https://www.cs.princeton.edu/events/26593 Register for live-stream online here: https://princeton.zoom.us/webinar/register/WN_ghiT2HbhSPqKBouJ-VwzFg Title: Scalable and Efficient Systems for Large Language Models Abstract: Large Language Models (LLMs) have been driving recent breakthroughs in AI. These advancements would not have been possible without the support of scalable and efficient infrastructure systems. In this talk, I will introduce several underlying systems I have designed and built to support the entire model lifecycle, from training to deployment to evaluation. First, I will present Alpa, a system for large-scale model-parallel training that automatically generates execution plans unifying data, operator, and pipeline parallelism. Next, I will discuss efficient deployment systems, covering the frontend programming interface and backend runtime optimizations for high-performance inference. Finally, I will complete the model lifecycle by presenting our model evaluation efforts, including the crowdsourced live benchmark platform, Chatbot Arena, and the automatic evaluation pipeline, LLM-as-a-Judge. These projects have collectively laid a solid foundation for large language model systems, being widely adopted by leading LLM developers and companies. I will conclude by outlining some future directions of machine learning systems, such as co-optimizing across the full stack for building AI-centric applications. Bio: Lianmin Zheng is a Ph.D. student in the EECS department at UC Berkeley, advised by Ion Stoica and Joseph E. Gonzalez. His research interests include machine learning systems, large language models, compilers, and distributed systems. He builds full-stack, scalable, and efficient systems to advance the development of AI. He co-founded LMSYS.org, where he leads impactful open-source large language model projects such as Vicuna and Chatbot Arena, which have received millions of downloads and served millions of users. He also co-organized the Big Model Tutorial at ICML 2022. He has received a Meta Ph.D. Fellowship, an IEEE Micro Best Paper Award, and an a16z open-source AI grant. Speaker: Emma Dauterman, University of California, Berkeley Date: Thursday, March 7 Time: 12:30pm EST Location: CS 105 Host: Amit Levy Event page: https://www.cs.princeton.edu/events/26585 Register for live-stream online here: https://princeton.zoom.us/webinar/register/WN_soNesOKXSFml9MPaTx_1iw Title: Secure systems from insecure components Abstract: In many computer systems today, an attacker that breaks one system component can steal data from millions of users. In this talk, I will present two systems that can withstand component compromise. I will describe (1) a single sign-on system that protects user security and privacy from a compromised single sign-on server, and (2) a secure-hardware-based backup service that protects user backups from compromised secure hardware devices. These systems provide strong security and privacy properties while taking into account practical constraints such as compatibility requirements, hardware limitations, and user expectations. Each splits user secrets across different system components, using new cryptographic tools to provide necessary functionality while protecting user data. Bio: Emma Dauterman is a Ph.D. candidate at UC Berkeley where she is advised by Raluca Ada Popa and Ion Stoica. Her research interests include computer security, systems, and applied cryptography. She has received the Microsoft Research Ada Lovelace fellowship, the NSF graduate research fellowship, and a UC Berkeley EECS excellence award.

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Kun Woo Cho will present his FPO "Programmable Smart Radio Environments: From Theory to Hardware Implementation" on October 1, 2024 at 3pm in CS 302.
by Gradinfo 26 Sep '24

26 Sep '24

Kun Woo Cho will present his FPO "Programmable Smart Radio Environments: From Theory to Hardware Implementation" on October 1 , 2024 at 3pm in CS 302. Examiner: Prof. Kyle Jamieson (Advisor, CS), Prof. Yasaman Ghasempour (ECE), Prof. Andrew Appel (CS) Reader: Prof. Wyatt Lloyd (CS), Prof. Omid Abari (UCLA), Dr. Ranveer Chandra (MSR) All are welcome to attend. Title: Programmable Smart Radio Environments: From Theory to Hardware Implementation Abstract: Today ’s wireless networks are undergoing a rapid transformation, scaling in traffic vol- ume, spectral efficiency, and radio count as never seen before. This thesis addresses the critical challenges emerging from this evolution in next-generation (NextG) wire- less networks, focusing on realizing three key services: enhanced mobile broadband (Gbps or above), ultra-reliable low latency communication (order of milliseconds), and massive machine type communication (up to one million per squared kilometer). To meet these diverse and demanding requirements, this thesis poses a central question: Can we build a smarter radio environment controlled and learned by soft- ware, configuring itself in real-time to meet different application needs? Current approaches to handle uncontrolled wireless signals are end-to-end. Unfortunately, sending and receiving endpoints are limited in their ability to shape this inherent propagation behavior. For instance, although multiple antennas can shape the beam pattern departing the sender, it cannot control how the resulting signals arrive at the receiver after traversing environmental obstacles. By focusing on changing the envi- ronment itself rather than the communication endpoints, this thesis offers a significant shift in design paradigms for modern wireless networks. First, millimeter-wave (mmWave) technology offers multi-Gbps data rates due to its wide spectral bands. However, the high frequency of mmWave signals makes them vulnerable to blockage by walls, people, and obstacles, significantly limiting their practical applications. This thesis introduces mmWall, a programmable smart surface deployed on buildings to fully control the mmWave radio environment. Com- prising over 4,000 sub-millimeter meta-materials, mmWall can steer signals through the surface or reflect them, bringing outdoor mmWave signals indoors and bypassing obstacles. Also, this thesis proposes Wall-Street, a smart surface installed on vehicles to provide seamless and reliable mmWave connectivity in high-mobility scenarios. Second, satellite networks uses constellations of thousands of satellites to provide low latency communication and global coverage. However, these networks face two significant challenges: outages due to transient blockage, and complications in beam alignment between users and satellites due to the use of different frequency sub-bands in the uplink and downlink directions. Extending the concept of a programmable smart radio to satellite communications, this thesis introduces Wall-E, a dual-band smart surface that mitigates signal blockage and enhances reliability of satellite-to- ground links, and Monolith, a smart surface that boosts inter-satellite link capacity. Third, while these smart surfaces address challenges at the physical layer, we also tackle issues at the link/MAC layer, particularly in massive Internet of Things (IoT) networks. This thesis introduces Cross-Link Channel Prediction (CLCP), a ma- chine learning technique that learns the radio environment and accordingly allocates networking resources to a large number of IoT devices. This AI-driven approach com- plements my programmable surfaces, creating a comprehensive smart radio solution for NextG networks.

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Joomy Korkut will present his FPO "Foreign Function Verification Through Metaprogramming" on October 9th, 2024 at 3pm in
by Gradinfo 25 Sep '24

25 Sep '24

Joomy Korkut will present his FPO "Foreign Function Verification Through Metaprogramming" on October 9th, 2024 at 3pm in Friend 202. Committee members: Examiners: Andrew Appel (adviser), Aarti Gupta, David Walker Readers: Zakary Kincaid and Matthieu Sozeau (INRIA Nantes) All are welcome to attend. Abstract: CertiCoq is a compiler from Coq to C that is verified in Coq. Thanks to CertiCoq’s mechanically checked proof of compiler correctness, users can be sure that programs they write and verify in Coq’s rich type system output the same results when compiled to C (and to machine language, via the CompCert verified compiler). However, in practice, large programs are rarely written in a single language; additional languages are used for better performance or for capabilities that the primary language lacks. In particular, because Coq lacks user-defined primitive types, mutation, and input/output actions, CertiCoq-compiled code must interact with another language to have those capabilities. Specifically, Coq code must be able to call C code and C code must be able to inspect and generate Coq values and call Coq code. But what happens to the correctness proofs when these two languages interact? A foreign C function has to be memory-safe, return the expected result, and have the expected side effect (or no effect). A specification that expresses these requirements must combine plain Coq, for the functional parts, and a program logic for C (such as the Verified Software Toolchain [VST]), for the verification of C functions. While VST is embedded in Coq, its specification language is quite different. Bridging this gap by connecting plain Coq and VST theorems in both directions requires a system of techniques and methods, many of which are made feasible by using metaprogramming as a general methodological approach. In this dissertation, I describe these techniques and methods. VST proofs about C foreign functions do not directly translate to proofs about Coq primitives. To bridge this gap, I propose a method of relating foreign functions and types to their functional models, allowing users to write proofs in plain Coq. I also provide examples of Coq programs with primitive types, mutation, and I/O actions, along with their correctness proofs, and demonstrate VeriFFI, the verified foreign function interface for CertiCoq.

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Invitation: Natural and Artificial Minds Launch Event: Thurs, Sept 26, 4pm
by Emily C. Lawrence 20 Sep '24

20 Sep '24

You are invited to the launch event for [ https://ai.princeton.edu/nam | Natural and Artificial Minds ] (NAM), a new AI Lab research initiative reenvisioning theory-driven cognitive science research in the age of artificial intelligence. [ https://ai.princeton.edu/nam-launch | Natural and Artificial Minds (NAM) Launch Event ] Date: Thursday, September 26, 4-6pm Location: Maeder Hall at Andlinger Center, 86 Olden Street [ https://forms.gle/bAMBy4PWEY8w3g61A | Registration ] The program opens with remarks by NAM co-directors Sarah-Jane Leslie and Tania Lombrozo. Two distinguished keynote lectures will follow: “Natural and Artificial Minds: Are they as Smart as We think?” by James L. (Jay) McClelland , and “ Empowerment as Causal Learning: Causal Learning as Empowerment ” by Alison Gopnik. The event will conclude with a reception. We look forward to seeing you on September 26 th ! Best regards, Sarah-Jane and Tania Sarah-Jane Leslie Class of 1943 Professor of Philosophy Tania Lombrozo Arthur W. Marks ’19 Professor of Psychology

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CSML Lunchtime Faculty Series: Sept 24 at 12:30pm
by Emily C. Lawrence 19 Sep '24

19 Sep '24

Center for Statistics and Machine Learning Faculty Lunchtime Seminars Featuring CSML Affiliated Faculty Members Speaker: Peter Henderson, Princeton University Title: AI Safety, Governance, and Evaluation When Models Can be Customized Day: September 24, 2024 Place CSML, Bendheim House, 26 Prospect Ave, Room 103 Time: 12:30-1:30 PM Lunch available from12:15 with RSVP to csml(a)princeton.edu Host: Peter Ramadge, CSML Director, Gordon Y.S. Wu Professor of Engineering Event info: [ https://csml.princeton.edu/events/ai-safety-governance-and-evaluation-when-… | https://csml.princeton.edu/events/ai-safety-governance-and-evaluation-when-… ] Abstract: New regulatory requirements would have AI model developers assure that models cannot induce harms even when downstream users can modify the model in different ways. This talk will examine these regulatory regimes, the challenges of such pre-deployment evaluation requirements, and potential paths forward for addressing safety concerns.

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Ziyang Xu will present his FPO "A Fast and Extensible Memory Profiling Framework" on September 27, 2024 at 10am in Friend 125.
by Nicki Mahler 16 Sep '24

16 Sep '24

Ziyang Xu will present his FPO "A Fast and Extensible Memory Profiling Framework" on September 27, 2024 at 10am in Friend 125. The members of his committee are as follows: Examiners: David August (adviser), Aarti Gupta, Amit Levy Readers: Zachary Kincaid and Simone Campanoni (Northwestern University) Abstract: Recent advancements in automatic parallelization offer a promising way to fully leverage modern processors, yet these techniques remain underutilized. To understand this gap, this dissertation presents a field study of the computational usage and needs. The study reveals that although many researchers have access to abundant parallel resources, they often lack the necessary tools or expertise to utilize them effectively, highlighting the need for practical, user-friendly, and efficient solutions. This dissertation explores the practicality of memory profiling, a critical technique for automatic parallelization. Memory profiling captures programs' dynamic memory behavior, assisting in debugging, tuning, and enabling advanced compiler optimizations. Building practical memory profilers often requires extensive compiler expertise, adeptness in program optimization, and significant implementation efforts, leaving a gap in the availability of fast and efficient profilers. To bridge this gap, this dissertation presents PROMPT, a pioneering framework for streamlined development of fast memory profilers. With it, developers only need to specify profiling events and define the core profiling logic, bypassing the complexities of custom instrumentation and intricate memory profiling components and optimizations. By integrating dynamic binary instrumentation alongside LLVM-IR and source instrumentation, PROMPT ensures comprehensive memory access coverage while reducing reliance on binary instrumentation. Two state-of-the-art memory profilers were ported to PROMPT with all features preserved. By focusing on the core profiling logic, the code was reduced by more than 65% and the profiling speed was improved by 5.3x and 7.1x respectively. To further underscore PROMPT's impact, a tailored memory profiling workflow was constructed for a sophisticated compiler optimization client. In just 570 lines of code, this redesigned workflow satisfies the client's memory profiling needs while achieving more than 90% reduction in profiling time and improved robustness compared to the original profilers.

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