- talks - lists.cs.princeton.edu

Thomas Macrina will present his General Exam on Monday, October 22, 2018 at 2pm in PNI 159
by Nicki Gotsis 15 Oct '18

15 Oct '18

Thomas Macrina will present his General Exam on Monday, October 22, 2018 at 2pm in PNI 159. The members of his committee are as follows: Sebastian Seung (adviser), Jonathan Pillow (Neuro), and Barbara Engelhardt. Everyone is invited to attend his talk, and those faculty wishing to remain for the oral exam following are welcome to do so. His abstract and reading list follow below. Title Aligning petascale serial-section electron microscopy images, and analyzing structure + function of networks of real neurons Abstract Routinely reconstructing neural wiring diagrams based on petascale serial section electron microscopy would be a boon for neuroscience. The major obstacle is producing a low-error alignment of 2D images into a 3D stack. I will discuss how we have used elastic models based on normalized cross correlation correspondences, and now optical flow models based on deep learning to overcome this obstacle. With routine reconstructions on the horizon, focus can turn to analysis of these wiring diagrams. I will also discuss my work investigating these real neural networks: correlating them with neural activity, and using contacts between neurons as a basis for connection properties . Reading List Braitenberg, Valentino, and Almut Schuez. 1998. Cortex Statistics Geometry Neuronal Connectivity. Springer. Goodfellow, Ian, Yoshua Bengio, and Aaron Courville. 2016. Deep Learning (Adaptive Computation and Machine Learning). Edited by Francis Bach. The MIT Press. Jaderberg, Max, Karen Simonyan, Andrew Zisserman, and Koray Kavukcuoglu. 2015. “Spatial Transformer Networks.” In Advances in Neural Information Processing Systems 28, edited by C. Cortes, N. D. Lawrence, D. D. Lee, M. Sugiyama, and R. Garnett, 2017–25. Curran Associates, Inc. Kasthuri, Narayanan, Kenneth Jeffrey Hayworth, Daniel Raimund Berger, Richard Lee Schalek, José Angel Conchello, Seymour Knowles-Barley, Dongil Lee, et al. 2015. “Saturated Reconstruction of a Volume of Neocortex.” Cell 162 (3): 648–61. Kubota, Yoshiyuki. 2014. “Untangling GABAergic Wiring in the Cortical Microcircuit.” Current Opinion in Neurobiology 26 (June): 7–14. Lee, Wei-Chung Allen, Vincent Bonin, Michael Reed, Brett J. Graham, Greg Hood, Katie Glattfelder, and R. Clay Reid. 2016. “Anatomy and Function of an Excitatory Network in the Visual Cortex.” Nature 532 (7599): 370–74. Luo, Liqun. 2015. Principles of Neurobiology. 1 edition. Garland Science. Mishchenko, Yuriy, Tao Hu, Josef Spacek, John Mendenhall, Kristen M. Harris, and Dmitri B. Chklovskii. 2010. “Ultrastructural Analysis of Hippocampal Neuropil from the Connectomics Perspective.” Neuron 67 (6): 1009–20. Ranjan, Anurag, and Michael J. Black. 2016. “Optical Flow Estimation Using a Spatial Pyramid Network.” arXiv [cs.CV]. arXiv. http://arxiv.org/abs/1611.00850. Saalfeld, Stephan, Richard Fetter, Albert Cardona, and Pavel Tomancak. 2012. “Elastic Volume Reconstruction from Series of Ultra-Thin Microscopy Sections.” Nature Methods 9 (7): 717–20. Yoo, I., D. G. C. Hildebrand, W. F. Tobin, and W. C. A. Lee. 2017. “ssEMnet: Serial-Section Electron Microscopy Image Registration Using a Spatial Transformer Network with Learned Features.” Deep Learning in. https://link.springer.com/chapter/10.1007/978-3-319-67558-9_29.

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Xiaoqi Chen will present his General Exam on Tuesday, Oct 23, 2018 at 10am in CS 302
by Nicki Gotsis 12 Oct '18

12 Oct '18

Xiaoqi Chen will present his General Exam on Tuesday, Oct 23, 2018 at 10am in CS 302. The members of his committee are Jennifer Rexford (adviser), Mark Braverman, and David Walker. Everyone is invited to attend his talk, and those faculty wishing to remain for the oral exam following are welcome to do so. His abstract and reading list follow below. Abstract: Network measurement is a vital tool for network operators to diagnose outages, optimize performance, and detect attacks. Recently, the development of programmable switches has enabled us to run measurement algorithms in the network switch directly, and analyze packets up to Tbps in throughput. However, the programming model of programmable switches is extremely constrained, which restricts the types of algorithms we can run in them. To achieve much-needed measurement goals of network operators, we design tailored algorithms to adapt to the programming constraints imposed by practical programmable switches. We first present PRECISON, which attempts to answer the Heavy-Hitter Flow Detection problem (find out which flows sent the largest number of packets). PRECISION can accurately identify the heavy-hitter flows using a small amount of memory, by recirculating a small number of packets probabilistically. Then, we present Snappy, which tries to solve the Heavy Flow in the Queue problem (which flows occupied a large fraction of queuing buffer). Snappy can pinpoint the bursty flows causing ephemeral long queues and potential packet loss, by maintaining multiple traffic snapshots of short time intervals. Our measurement algorithms enable network operators to perform immediate actions against these specific network flows, inhibiting congestion in real-time, while potentially improving service quality for other network flows. Reading list: Textbook: * Larry L. Peterson and Bruce S. Davie. Computer Networks: A Systems Approach . Elsevier, 2011 (5th ed). Papers: 1. [E2E ‘84] Jerome H. Saltzer, David P. Reed, and David D. Clark. "End-to-end arguments in system design." ACM Transactions on Computer Systems (TOCS) 2.4 (1984): 277-288. 2. [Ether ’99] Will E. Leland, Murad S. Taqqu, Walter Willinger, and Daniel V. Wilson. "On the self-similar nature of Ethernet traffic (extended version)." IEEE/ACM Transactions on Networking (ToN) 2.1 (1994): 1-15. 3. [Click ’00] Eddie Kohler, Robert Morris, Benjie Chen, John Jannotti, and M. Frans Kaashoek. "The Click modular router." ACM Transactions on Computer Systems (TOCS) 18.3 (2000): 263-297. 4. [SS ’05] Ahmed Metwally, Divyakant Agrawal, and Amr El Abbadi. "Efficient computation of frequent and top-k elements in data streams." International Conference on Database Theory . Springer, Berlin, Heidelberg, 2005. 5. [pFabric ’13] Mohammad Alizadh, Shuang Yang, Milad Sharif, Sachin Katti, Nick McKeown, Balaji Prabhakar, and Scott Shenker. "pfabric: Minimal near-optimal datacenter transport." ACM SIGCOMM Computer Communication Review . Vol. 43. No. 4. ACM, 2013. 6. [P4 ‘14] Pat Bosshart, Dan Daly, Glen Gibb, Martin Izzard, Nick McKeown, Jennifer Rexford, Cole Schlesinger* Dan Talayco, Amin Vahdat, George Varghese, and David Walker. "P4: Programming protocol-independent packet processors." ACM SIGCOMM Computer Communication Review 44.3 (2014): 87-95. 7. [UnivMon ‘16] Zaoxing Liu, Antonis Manousis, Gregory Vorsanger, Vyas Sekar, and Vladimir Braverman. "One sketch to rule them all: Rethinking network flow monitoring with UnivMon." Proceedings of the 2016 ACM SIGCOMM Conference . ACM, 2016. 8. [RAP ‘16] Ran Ben Basat, Gil Einziger, Roy Friedman, and Yaron Kassner. "Randomized admission policy for efficient top-k and frequency estimation." INFOCOM 2017-IEEE Conference on Computer Communications, IEEE . IEEE, 2017. 9. [StarFlow ‘18] John Sonchack, Oliver Michel, Adam J. Aviv, Eric Keller, and Jonathan M. Smith. "Scaling Hardware Accelerated Network Monitoring to Concurrent and Dynamic Queries With* Flow." 2018 USENIX Annual Technical Conference (USENIX ATC 18) . USENIX Association, 2018. 10. [AFQ ’18] Naveen Kr. Sharma, Ming Liu, Kishore Atreya, and Arvind Krishnamurthy. "Approximating Fair Queueing on Reconfigurable Switches." USENIX Symposium on Networked Systems Design and Implementation . 2018. Catching heavy network flows using programmable switches

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Speaker-Sreepathi Pai, TODAY at 12:30
by Emily C. Lawrence 12 Oct '18

12 Oct '18

Speaker Sreepathi Pai from University of Rochester Friday, October 12, 2018 - 12:30pm Computer Science - Room 105 Host: Tyler Sorensen and Margaret Martonosi “High-performance Graph Processing on GPUs” Abstract: Back in 2013, implementing high-performance graph algorithms for GPUs required manual coding in CUDA, a slow and difficult process. To significantly lower the level of effort required, we created IrGL , a language and compiler specifically for generating high-performance graph algorithm implementations for GPUs. Powered by three throughput optimizations, the IrGL -generated code outperformed nearly all handwritten graph algorithms achieving speedups of up to 6x. Freed from the drudgery of writing low-level code, IrGL has allowed us to look at a number of problems revolving around graphs. We've used the high-performance implementations to identify key memory system bottlenecks that limit performance on current GPU architectures. We've also translated graph database queries to IrGL and executed them on GPUs. In the course of extending this to the general problem of subgraph isomorphism (a key primitive in graph databases), we were named GraphChallenge 2017 champions for our implementation of the triangle-counting and k-truss problems. Along the way, we also built Groute , a runtime for asynchronous multi-GPU graph analytics that has achieved order-of-magnitude improvements over existing synchronous implementations. We sped up exhaustive testing of software by traversing graphs that were too big to materialize in memory. Recently, we have also used IrGL's ability to generate hundreds of variants of the same graph algorithm to explore correctness and performance portability issues on GPUs. Many interesting questions still remain unexplored, however, and I will summarize our current efforts in this area. [Joint work with Keshav Pingali , Tal Ben-Nun, Michael Sutton, M. Amber Hassaan , Chad Voegele , Yi-Shan Lu, Ahmet Celik , Milos Gligoric , Sarfraz Khurshid , Tyler Sorensen and Alastair Donaldson] Bio: Sreepathi Pai is an Assistant Professor of Computer Science at the University of Rochester. His research interests are in compilers, programming languages and implementation, performance models and computer architecture. His most recent research has revolved around the IrGL compiler that produces high-performance GPU code for graph algorithms. He earned his PhD at the Indian Institute of Science and his B.E. in Computer Engineering at the University of Mumbai. Prior to joining the Department of Computer Science at Rochester, he was a Postdoctoral Fellow at the University of Texas at Austin.

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EE Seminar - Thursday, October 18, 2018, 4:30pm, E-Quad B205, Ayfer Ozgur Aydin, Stanford
by Emily Lawrence 11 Oct '18

11 Oct '18

Department of Electrical Engineering Seminar Series Speaker: Prof. Ayfer Ozgur Aydin Stanford University Title: A Geometric Approach to two Problems in Networks: Learning High-Dimensional Distributions and Communication with Relays Date: Thursday, October 18, 2018 Time: 4:30 pm Room: Engineering Quadrangle B205 Host: Prof. Yuxin Chen Abstract: We investigate the pivotal role geometry can play in characterizing the fundamental limits of information flow in two different network problems. We first consider a classical problem in network information theory: characterizing the capacity of a so-called relay channel. Even though the relay channel has been one of the central problems in network information theory, its capacity remains unknown for almost four decades. We solve an open problem posed by Cover in 1987. This problem, which Cover calls the "Capacity of the Relay Channel", corresponds to characterizing the capacity of this channel at one special operating point. Our approach is geometric and builds on an extension we develop for the isoperimetric inequality on a high-dimensional sphere. We then turn to another network problem, where the end goal is not to communicate a message but learn a high-dimensional distribution or parameter from its distributed samples under communication constraints. We first provide a geometric characterization of Fisher information from quantized samples. We then use this characterization to prove tight minimax bounds for distributed estimation of common statistical models (such as the product Bernoulli model, multinomial model, dense/sparse Gaussian location models). Our results show that the impact of the communication constraint can be drastically different depending on the tail behavior of the score function of the model. Some of our results recover or strengthen existing results in this area with simpler and more transparent proofs. We conclude with a discussion on future directions in the intersection of geometry and information theory. First part of the talk is joint work with Xiugang Wu and Leighton Barnes. Second part is joint work with Leighton Barnes, Yanjun Han and Tsachy Weissman. Bio: Ayfer Ozgur received her Ph.D. degree in 2009 from the Information Processing Group at EPFL, Switzerland. In 2010 and 2011, she was a post-doctoral scholar at the same institution. She is an Assistant Professor in the Electrical Engineering Department at Stanford University since 2012. Her research interests include distributed communication and learning, wireless systems, and information theory. Dr. Ozgur received the EPFL Best Ph.D. Thesis Award in 2010, an NSF CAREER award in 2013, the Okawa Foundation Research Grant and the IEEE 2018 Communication Theory Technical Committee (CTTC) Early Achievement Award in 2018. This seminar is supported with funds from the Korhammer Lecture Series.

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REMINDER: Speaker-Sreepathi Pai, tomorrow at 12:30
by Emily C. Lawrence 11 Oct '18

11 Oct '18

Speaker Sreepathi Pai from University of Rochester Friday, October 12, 2018 - 12:30pm Computer Science - Room 105 Host: Tyler Sorensen and Margaret Martonosi “High-performance Graph Processing on GPUs” Abstract: Back in 2013, implementing high-performance graph algorithms for GPUs required manual coding in CUDA, a slow and difficult process. To significantly lower the level of effort required, we created IrGL , a language and compiler specifically for generating high-performance graph algorithm implementations for GPUs. Powered by three throughput optimizations, the IrGL -generated code outperformed nearly all handwritten graph algorithms achieving speedups of up to 6x. Freed from the drudgery of writing low-level code, IrGL has allowed us to look at a number of problems revolving around graphs. We've used the high-performance implementations to identify key memory system bottlenecks that limit performance on current GPU architectures. We've also translated graph database queries to IrGL and executed them on GPUs. In the course of extending this to the general problem of subgraph isomorphism (a key primitive in graph databases), we were named GraphChallenge 2017 champions for our implementation of the triangle-counting and k-truss problems. Along the way, we also built Groute , a runtime for asynchronous multi-GPU graph analytics that has achieved order-of-magnitude improvements over existing synchronous implementations. We sped up exhaustive testing of software by traversing graphs that were too big to materialize in memory. Recently, we have also used IrGL's ability to generate hundreds of variants of the same graph algorithm to explore correctness and performance portability issues on GPUs. Many interesting questions still remain unexplored, however, and I will summarize our current efforts in this area. [Joint work with Keshav Pingali , Tal Ben-Nun, Michael Sutton, M. Amber Hassaan , Chad Voegele , Yi-Shan Lu, Ahmet Celik , Milos Gligoric , Sarfraz Khurshid , Tyler Sorensen and Alastair Donaldson] Bio: Sreepathi Pai is an Assistant Professor of Computer Science at the University of Rochester. His research interests are in compilers, programming languages and implementation, performance models and computer architecture. His most recent research has revolved around the IrGL compiler that produces high-performance GPU code for graph algorithms. He earned his PhD at the Indian Institute of Science and his B.E. in Computer Engineering at the University of Mumbai. Prior to joining the Department of Computer Science at Rochester, he was a Postdoctoral Fellow at the University of Texas at Austin.

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Colloquium Speaker-Andy Myers '96, TODAY at 12:30
by Emily C. Lawrence 09 Oct '18

09 Oct '18

Colloquium Speaker Andy Myers ’96 from Jane Street Tuesday, October 9, 2018 - 12:30pm Computer Science - Room 105 Host: Jennifer Rexford & David Walker *Lunch available for talk attendees at 12:00 pm * “Trading Networks” Abstract: The talk will discuss some of the unique ways in which trading firms use (and misuse) various bits of technology (switches, layer-1 devices, microwaves, FPGAs), to build networking infrastructure that achieves their goals. Bio: Andy Myers has been building low latency trading systems at Jane Street since 2014. Previously he was a Systems Architect at GETCO. He received his A.B. from Princeton in 1996 and his MS from Carnegie Mellon in 1998.

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Speaker-Sreepathi Pai, Friday, October 12
by Emily C. Lawrence 08 Oct '18

08 Oct '18

Speaker Sreepathi Pai from University of Rochester Friday, October 12, 2018 - 12:30pm Computer Science - Room 105 Host: Margaret Martonosi “High-performance Graph Processing on GPUs” Abstract: Back in 2013, implementing high-performance graph algorithms for GPUs required manual coding in CUDA, a slow and difficult process. To significantly lower the level of effort required, we created IrGL , a language and compiler specifically for generating high-performance graph algorithm implementations for GPUs. Powered by three throughput optimizations, the IrGL -generated code outperformed nearly all handwritten graph algorithms achieving speedups of up to 6x. Freed from the drudgery of writing low-level code, IrGL has allowed us to look at a number of problems revolving around graphs. We've used the high-performance implementations to identify key memory system bottlenecks that limit performance on current GPU architectures. We've also translated graph database queries to IrGL and executed them on GPUs. In the course of extending this to the general problem of subgraph isomorphism (a key primitive in graph databases), we were named GraphChallenge 2017 champions for our implementation of the triangle-counting and k-truss problems. Along the way, we also built Groute , a runtime for asynchronous multi-GPU graph analytics that has achieved order-of-magnitude improvements over existing synchronous implementations. We sped up exhaustive testing of software by traversing graphs that were too big to materialize in memory. Recently, we have also used IrGL's ability to generate hundreds of variants of the same graph algorithm to explore correctness and performance portability issues on GPUs. Many interesting questions still remain unexplored, however, and I will summarize our current efforts in this area. [Joint work with Keshav Pingali , Tal Ben-Nun, Michael Sutton, M. Amber Hassaan , Chad Voegele , Yi-Shan Lu, Ahmet Celik , Milos Gligoric , Sarfraz Khurshid , Tyler Sorensen and Alastair Donaldson] Bio: Sreepathi Pai is an Assistant Professor of Computer Science at the University of Rochester. His research interests are in compilers, programming languages and implementation, performance models and computer architecture. His most recent research has revolved around the IrGL compiler that produces high-performance GPU code for graph algorithms. He earned his PhD at the Indian Institute of Science and his B.E. in Computer Engineering at the University of Mumbai. Prior to joining the Department of Computer Science at Rochester, he was a Postdoctoral Fellow at the University of Texas at Austin.

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Reminder: Colloquium Speaker-Andy Myers '96, tomorrow at 12:30
by Emily C. Lawrence 08 Oct '18

08 Oct '18

Colloquium Speaker Andy Myers ’96 from Jane Street Tuesday, October 9, 2018 - 12:30pm Computer Science - Room 105 Host: Jennifer Rexford & David Walker *Lunch available for talk attendees at 12:00pm* “Trading Networks” Abstract: The talk will discuss some of the unique ways in which trading firms use (and misuse) various bits of technology (switches, layer-1 devices, microwaves, FPGAs), to build networking infrastructure that achieves their goals. Bio: Andy Myers has been building low latency trading systems at Jane Street since 2014. Previously he was a Systems Architect at GETCO. He received his A.B. from Princeton in 1996 and his MS from Carnegie Mellon in 1998.

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Colloquium Speaker-Andy Myers '96, Tuesday, October 9
by Emily Lawrence 02 Oct '18

02 Oct '18

Colloquium Speaker Andy Myers '96 from Jane Street Tuesday, October 9, 2018 - 12:30pm Computer Science - Room 105 Host: Jennifer Rexford & David Walker "Trading Networks" Abstract: The talk will discuss some of the unique ways in which trading firms use (and misuse) various bits of technology (switches, layer-1 devices, microwaves, FPGAs), to build networking infrastructure that achieves their goals. Bio: Andy Myers has been building low latency trading systems at Jane Street since 2014. Previously he was a Systems Architect at GETCO. He received his A.B. from Princeton in 1996 and his MS from Carnegie Mellon in 1998.

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TODAY 10/1 at 4:30pm in B205 - Chandra Nair, Chinese University of Hong Kong
by Emily Lawrence 01 Oct '18

01 Oct '18

EE SEMINAR SERIES Speaker: Chandra Nair, Chinese University of Hong Kong Title: Non-Convex Optimization And Multiuser Information Theory Day: Monday, October 1, 2018 Time: 4:30 pm Room: B205 Engineering Quadrangle Host: Prof. Peter Ramadge Abstract: Capacity regions in multiuser information theory were traditionally established using an achievability argument and converses to corresponding rate regions. Recently, however, capacity regions have been established, for non-trivial and important classes of channels (such as additive Gaussian noise models and others), by optimizing functionals on probability spaces generated from inner or outer bounds and showing that the bounds match for these channels. Optimization ideas have also been used to determine if certain achievable regions proposed in the literature are optimal or sub-optimal in general. The study of these non-convex optimization problems required developing new insights and techniques. In this talk, I will outline the ideas involved in obtaining the results, as well as illustrate the relationship of these problems to hypercontractivity and related notions studied primarily outside information theory. I will present some unifying observations across the family of optimization problems that we have managed to solve, and state some elementary instances of similar problems whose solutions would be of immense interest. Bio: Chandra Nair is an Associate Professor with the Information Engineering department at The Chinese University of Hong Kong. His research interests and contributions have been in developing ideas, tools, and techniques to tackle families of combinatorial and non-convex optimization problems arising primarily in the information sciences. His recent research focus has been on studying the optimality of certain inner and outer bounds to capacity regions for fundamental problems in multiuser information theory. He, along with his doctoral student Yanlin Geng, received the 2016 Information Theory Society paper award for developing a novel way to establish the optimality of Gaussian distributions. A proof of the Parisi and Coppersmith-Sorkin conjectures in the Random Assignment Problem constituted his doctoral dissertation; and he resolved some conjectures related to Random Energy model approximation of the Number Partition Problem during his post-doctoral years. Chandra Nair got his Bachelor's degree, B.Tech(EE), from IIT Madras (India) where he was the Philips (India) and Siemens (India) award winner for the best academic performance. Subsequently he was a Stanford graduate fellow (00-04) and a Microsoft graduate fellow (04-05) during his graduate studies at the EE department of Stanford university. Later, he became a post-doctoral researcher (05-07) with the theory group at Microsoft Research, Redmond. He has been a faculty member of the information engineering department at The Chinese university of Hong Kong since Fall 2007. He was an associate editor for the IEEE Transactions on Information Theory (2014-2016) and is currently a distinguished lecturer of the IEEE Information theory society. He is a fellow of the IEEE. He serves as the Programme Director of the undergraduate program on Mathematics and Information Engineering and the Director of the Institute of Theoretical Computer Science and Communications.

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