- talks - lists.cs.princeton.edu

CS Department Colloquium Series: week of Feb 27-Mar 3
by Emily C. Lawrence 24 Feb '23

24 Feb '23

The CS Department Colloquium Series kicks off next week. Announcements will be sent each Friday with the following week's talks. And the full calendar can be viewed here: [ https://www.cs.princeton.edu/general/newsevents/events | https://www.cs.princeton.edu/general/newsevents/events ] Speaker: Milijana Surbatovich, Carnegie Mellon University Date: Monday, February 27 Time: 12:30pm EST Location: CS 105 Host: Amit Levy Event page: https://www.cs.princeton.edu/events/26341 Title: Designing Formally Correct Intermittent Systems Abstract: "Extreme edge computing" is an emerging computing paradigm targeting application domains like medical wearables, disaster-monitoring tiny satellites, or smart infrastructure. This paradigm brings sophisticated sensing and data processing into an embedded device's deployment environment, enabling computing in environments that are too harsh, inaccessible, or dense to support frequent communication with a central server. Batteryless, energy harvesting devices (EHDs) are key to enabling extreme edge computing; instead of using batteries, which may be too costly or even impossible to replace, they can operate solely off energy collected from their environment. However, harvested energy is typically too weak to power a device continuously, causing frequent, arbitrary power failures that break traditional software and make correct programming difficult. Given the high assurance requirements of the envisioned application domains, EHDs must execute software without bugs that could render the device inoperable or leak sensitive information. While researchers have developed intermittent systems to support programming EHDs, they rely on informal, undefined correctness notions that preclude proving such necessary correctness and security properties. My research lays the foundation for designing formally correct intermittent systems that provide correctness guarantees. In this talk, I show how existing correctness notions are insufficient, leading to unaddressed bugs. I then present the first formal model of intermittent execution, along with correctness definitions for important memory consistency and timing properties. I use these definitions to design and implement both the language abstractions that programmers can use to specify their desired properties and the enforcement mechanisms that uphold them. Finally, I discuss my future research directions in intermittent system security and leveraging formal methods for full-stack correctness reasoning. Bio: Milijana Surbatovich is a PhD Candidate in the Electrical and Computer Engineering Department at Carnegie Mellon University, co-advised by Professors Brandon Lucia and Limin Jia. Her research interests are in applied formal methods, programming languages, and systems for intermittent computing and non-traditional computing platforms broadly. She is excited by research problems that require reasoning about correctness and security across the architecture, system, and language stack. She was awarded CMU's CyLab Presidential Fellowship in 2021 and was selected as a 2022 Rising Star in EECS. Previously, she received an MS in ECE from CMU in 2020 and a BS in Computer Science from the University of Rochester in 2017. Speaker: Stephanie Wang, University of California, Berkeley Date: Wednesday, March 1 Time: 12:30pm EST Location: CS 105 Host: Wyatt Lloyd Event page: https://www.cs.princeton.edu/events/26342 Title: The Design of a General-Purpose Distributed Execution System Abstract: Scaling applications with distributed execution has become the norm. With the rise of big data and machine learning, more and more developers must build applications that involve complex and data-intensive distributed processing. In this talk, I will discuss the design of a general-purpose distributed execution system that can serve as a common platform for such applications. Such a system offers two key benefits: (1) common system functionality such as distributed resource management can be shared across different application domains, and (2) by building on the same platform, applications across domains can easily interoperate. First, I will introduce the distributed futures interface, a powerful yet expressive distributed programming abstraction for remote execution and memory. Second, I will introduce ownership, an architecture for distributed futures systems that simultaneously provides horizontal scalability, low latency, and fault tolerance. Finally, I will present Exoshuffle, a large-scale shuffle system that builds on distributed futures and ownership to match the speed and reliability of specialized data processing frameworks while using an order of magnitude less code. These works have reached a broad audience through Ray, an open-source distributed futures system for Python that has more than 23,000 GitHub stars and that has been used to train ChatGPT and to break the world record for CloudSort. Bio: Stephanie Wang is a final-year PhD student at UC Berkeley, advised by Professor Ion Stoica. She is interested in distributed systems, with current focus on problems in cloud computing and fault tolerance. She is a co-creator and committer of the popular open-source project Ray for distributed Python. Stephanie has received the UC Berkeley Chancellor’s Fellowship, a Distinguished Artifact Award at SOSP’19, and was selected for Rising Stars in EECS in 2021. Speaker: Tri Dao, Stanford University Date: Thursday, March 2 Time: 12:30pm EST Location: CS 105 Host: Jia Deng Event page: https://www.cs.princeton.edu/events/26343 Title: Hardware-aware Algorithms for Efficient Machine Learning Abstract: Machine learning (ML) models training will continue to grow to consume more cycles, their inference will proliferate on more kinds of devices, and their capabilities will be used on more domains. Some goals central to this future are to make ML models efficient so they remain practical to train and deploy, and to unlock new application domains with new capabilities. We describe some recent developments in hardware-aware algorithms to improve the efficiency-quality tradeoff of ML models and equip them with long context. In the first half, we focus on structured sparsity, a natural approach to mitigate the extensive compute and memory cost of large ML models. We describe a line of work on learnable fast transforms which, thanks to their expressiveness and efficiency, yields some of the first sparse training methods to speed up large models in wall-clock time (2x) without compromising their quality. In the second half, we focus on efficient Transformer training and inference for long sequences. We describe FlashAttention, a fast and memory-efficient algorithm to compute attention with no approximation. By careful accounting of reads/writes between different levels of memory hierarchy, FlashAttention is 2-4x faster and uses 10-20x less memory compared to the best existing attention implementations, allowing us to train higher-quality Transformers with 8x longer context. FlashAttention is now widely used in some of the largest research labs and companies, in just 6 months after its release. We conclude with some exciting directions in ML and systems, such as software-hardware co-design, structured sparsity for scientific AI, and long context for new AI workflows and modalities. Bio: Tri Dao is a PhD student in Computer Science at Stanford, co-advised by Christopher Ré and Stefano Ermon. He works at the interface of machine learning and systems, and his research interests include sequence models with long-range memory and structured matrices for compact deep learning models. His work has received the ICML 2022 Outstanding paper runner-up award.

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ECE Seminar 3/2/2023 - Thierry Tambe, Harvard University
by Emily C. Lawrence 23 Feb '23

23 Feb '23

ECE SEMINAR Speaker: Thierry Tambe, Harvard University Title: Architecting High Performance Silicon Systems for Accurate, Adaptive, and Efficient On-Chip Deep Learning Day: March 2, 2023 Time: 4:30pm Location: B205 Engineering Quadrangle Host: Sharad Malik Abstract: The unabated pursuit of omniscient and omnipotent AI is levying hefty latency, memory, and energy taxes at all computing scales. My research is building a heterogeneity of self-adaptive solutions co-optimized across the algorithm, architecture, and silicon stack to generate breakthrough advances in arithmetic performance, compute density and efficiency for on-chip machine learning, and natural language processing (NLP) in particular. In the algorithm front, I will discuss best paper award-winning work on developing a novel floating-point based data type, AdaptivFloat, which enables resilient quantized AI computations; and is particularly suitable for NLP networks with large parameter distribution. Then, I will describe a 16nm chip prototype that adopts AdaptivFloat in the acceleration of noise-robust AI speech and machine translation tasks - and whose fidelity to the front-end application is verified via a formal hardware/software compiler interface. Towards the goal of lowering the prohibitive energy cost of inferencing large language models on TinyML devices, I will describe a principled algorithm-hardware co-design solution, validated in a 12nm chip tapeout, that accelerates Transformer workloads by tailoring the accelerator's latency and energy expenditures according to the complexity of the input query it processes. Finally, I will conclude with some of my current research efforts on further pushing the on-chip energy-efficiency frontiers by leveraging specialized non-conventional dynamic memory structures for ML training -- and recently prototyped in a 16nm chip tapeout. Bio: Thierry Tambe is a final year Electrical Engineering PhD candidate at Harvard University advised by Prof. Gu-Yeon Wei and Prof. David Brooks. His current research interests focus on designing energy-efficient and high-performance algorithms, hardware accelerators and systems for machine learning and natural language processing in particular. He also bears a keen interest in agile SoC design methodologies. Prior to debuting his doctoral studies, Thierry was an engineer at Intel in Hillsboro, Oregon, USA designing various mixed-signal architectures for high-bandwidth memory and peripheral interfaces on Xeon and Xeon-Phi HPC SoCs. He received a B.S. (2010) and M.Eng. (2012) in Electrical Engineering from Texas A&M University. Thierry Tambe is a recipient of the Best Paper Award at the 2020 ACM/IEEE Design Automation Conference, a 2021 NVIDIA Graduate PhD Fellowship, and a 2022 IEEE SSCS Predoctoral Achievement Award.

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CITP Distinguished Lecture Series: Thomas Ristenpart happening NOW
by Emily C. Lawrence 22 Feb '23

22 Feb '23

CITP Distinguished Lecture Series: Thomas Ristenpart – Mitigating Technology Abuse in Intimate Partner Violence and Encrypted Messaging Date: Wednesday, February 22, 2023 Time: 4:30 pm - 6:00 pm Location: Friend Center Convocation Room [ https://forms.gle/igzdYph1aLCTHpXLA | Please register here ] to attend in person. Co-sponsored by the Department of Computer Science and the Department of Electrical and Computer Engineering Computer security is traditionally about the protection of technology, whereas trust and safety efforts focus on preventing technology abuse from harming people. In this talk, we’ll explore the interplay between security and tech abuse, and make the case that trust and safety represents an important frontier for computer security researchers. To do so, we will draw on examples from two lines of my recent work. First, an overview our work on technology abuse in the context of intimate partner violence (IPV) will be presented. IPV is a widespread social ill affecting about one in four women and one in ten men at some point in their lives. Via interviews with survivors and professionals, online measurement studies, and reverse engineering of malicious tools, our research has provided the most granular view to date of technology abuse in IPV contexts. This has helped educate our efforts on intervention design, most notably in the form of what we call clinical computer security: direct, expert assistance to help survivors navigate technology abuse. Our work led to establishing the Clinic to End Tech Abuse, which has so far worked to help hundreds of survivors of IPV in New York City. Second, we’ll discuss how basic security tools like encrypted messaging need to be adapted in light of tech abuse. Here we find a fundamental tension between the desire for messaging service providers to help moderate malicious content and the confidentiality goals of encryption, which prevent the platform from seeing content. How we end up reconceptualizing and redesigning basic cryptographic tools to more securely support abuse mitigation will be presented. The talk will include content on abuse, including discussion of physical, sexual, and emotional violence. Bio: Thomas Ristenpart is an associate professor at Cornell Tech and a member of the computer science department at Cornell University. Before joining Cornell Tech in May, 2015, he spent four and a half years as an assistant professor at the University of Wisconsin-Madison. He completed his Ph.D. at UC San Diego in 2010. His research spans a wide range of computer security topics, with recent focuses including digital privacy and safety in intimate partner violence, anti-abuse mitigations for encrypted messaging systems, improvements to authentication mechanisms including passwords, and topics in applied and theoretical cryptography. His work is routinely featured in the media and has been recognized by a number of distinguished paper awards, two ACM CCS test-of-time awards, an Advocate of New York City award, an NSF CAREER Award, and a Sloan Research Fellowship. To request accommodations for a disability please contact Jean Butcher, butcher(a)princeton.edu , at least one week prior to the event. The video will be posted to the CITP website, the CITP YouTube channel and the Princeton University Media Central channel. The livestream will be available here: [ https://mediacentrallive.princeton.edu/ | https://mediacentrallive.princeton.edu/ ]

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TODAY 2/15 at 4:30pm - ECE Seminar - Priyanka Raina, Stanford University
by Emily C. Lawrence 15 Feb '23

15 Feb '23

ECE SEMINAR Speaker: Priyanka Raina, Stanford University Title: Agile Design of Domain-Specific Accelerators and Compilers Day: February 15, 2023 Time: 4:30pm Location: B205 Engineering Quadrangle Host: Naveen Verma Abstract: With the slowing of Moore's law, computer architects have turned to domain-specific hardware accelerators to improve the performance and efficiency of computing systems. However, programming these systems entails significant modifications to the software stack to properly leverage the specialized hardware. Moreover, the accelerators become obsolete quickly as the applications evolve. What is needed is a structured approach for generating programmable accelerators and for updating the software compiler as the accelerator architecture evolves with the applications. In this talk, I will describe a new agile methodology for co-designing programmable hardware accelerators and compilers. Our methodology employs a combination of new programming languages and formal methods to automatically generate the accelerator hardware and its compiler from a single specification. This enables faster evolution and optimization of accelerators, because of the availability of a working compiler. I will showcase this methodology using Amber, a coarse-grained programmable accelerator for imaging and machine learning (ML) we designed and fabricated using our flow in TSMC 16 nm technology. I will show how we agilely evolved Amber into Onyx, our next generation accelerator, using an application-driven design space exploration framework called APEX enabled by our hardware-compiler co-design flow. Bio: Priyanka Raina is an Assistant Professor of Electrical Engineering at Stanford University. She received her B.Tech. degree in Electrical Engineering from the IIT Delhi in 2011 and her S.M. and Ph.D. degrees in Electrical Engineering and Computer Science from MIT in 2013 and 2018. Priyanka's research is on creating high-performance and energy-efficient architectures for domain-specific hardware accelerators in existing and emerging technologies. She also works on methodologies for agile hardware-software co-design. Her research has won best paper awards at VLSI, ESSCIRC and MICRO conferences and in the JSSC journal. She has also won the Intel Rising Star Faculty Award, Hellman Faculty Scholar Award and is a Terman Faculty Fellow.

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CS Talks: Dr. Eleazar Eskin Tues, Feb 21st, at 12:30
by Michael Estepp 14 Feb '23

14 Feb '23

Speaker: Dr. Eleazar Eskin, UCLA Title: Detecting COVID-19 with Genomic Sequencing: From bench to vending machine Day: February 21, 2023 Time: 12:30pm Location: CS 105 Host: Ben Raphael Abstract: At UCLA we developed one of the only novel technologies for COVID-19 diagnostic testing that was deployed on a large scale. The assay, which we named SwabSeq, performs genomic sequencing of pooled samples tagged with sample-specific molecular barcodes and then uses computational approaches to deconvolve the pooled samples into individual diagnoses, enabling the testing of thousands of nasal or saliva samples for SARS-CoV-2 RNA in a single run without the need for RNA extraction. The efficiency of SwabSeq has enabled a small facility with a handful of staff to perform over 1,500,000 tests, with an analytical sensitivity and specificity comparable to or better than traditional qPCR test with turnaround times of less than 24 h. SwabSeq could be rapidly adapted for the detection of other pathogens. Bio: Dr. Eleazar Eskin is the founding Chair of the Department of Computational Medicine at UCLA. He is also a Professor in the Computational Medicine, Computer Science and Human Genetics departments. His research focuses on developing computational methods for the analysis of genetic variation and discovering the genetic basis of human disease. He was a founding faculty of multiple academic programs at UCLA including the Bioinformatics Ph.D. Program, the Undergraduate Minor in Bioinformatics, the Bruins in Genomics Summer Research Program and the Computational Genomics Summer Institute. He is a Fellow of the International Society of Computational Biology and a Alfred P Sloan Foundation Research Fellow. *This talk will NOT be recorded or live streamed.

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ECE Seminar 2/15/2023 - Priyanka Raina, Stanford University
by Emily C. Lawrence 08 Feb '23

08 Feb '23

ECE SEMINAR Speaker: Priyanka Raina, Stanford University Title: Agile Design of Domain-Specific Accelerators and Compilers Day: February 15, 2023 Time: 4:30pm Location: B205 Engineering Quadrangle Host: Naveen Verma Abstract: With the slowing of Moore's law, computer architects have turned to domain-specific hardware accelerators to improve the performance and efficiency of computing systems. However, programming these systems entails significant modifications to the software stack to properly leverage the specialized hardware. Moreover, the accelerators become obsolete quickly as the applications evolve. What is needed is a structured approach for generating programmable accelerators and for updating the software compiler as the accelerator architecture evolves with the applications. In this talk, I will describe a new agile methodology for co-designing programmable hardware accelerators and compilers. Our methodology employs a combination of new programming languages and formal methods to automatically generate the accelerator hardware and its compiler from a single specification. This enables faster evolution and optimization of accelerators, because of the availability of a working compiler. I will showcase this methodology using Amber, a coarse-grained programmable accelerator for imaging and machine learning (ML) we designed and fabricated using our flow in TSMC 16 nm technology. I will show how we agilely evolved Amber into Onyx, our next generation accelerator, using an application-driven design space exploration framework called APEX enabled by our hardware-compiler co-design flow. Bio: Priyanka Raina is an Assistant Professor of Electrical Engineering at Stanford University. She received her B.Tech. degree in Electrical Engineering from the IIT Delhi in 2011 and her S.M. and Ph.D. degrees in Electrical Engineering and Computer Science from MIT in 2013 and 2018. Priyanka's research is on creating high-performance and energy-efficient architectures for domain-specific hardware accelerators in existing and emerging technologies. She also works on methodologies for agile hardware-software co-design. Her research has won best paper awards at VLSI, ESSCIRC and MICRO conferences and in the JSSC journal. She has also won the Intel Rising Star Faculty Award, Hellman Faculty Scholar Award and is a Terman Faculty Fellow.

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Princeton Robotics Seminar: Feb 10, 2022 - Ken Goldberg
by Emily C. Lawrence 07 Feb '23

07 Feb '23

Speaker: Ken Goldberg, William S. Floyd Jr. Distinguished Chair in Engineering, UC Berkeley Date: Friday Feb 10, 2022 Time: 11am EST Location: Computer Science 105 Event page: [ https://robo.princeton.edu/seminar | https://robo.princeton.edu/seminar ] Title: The New Wave in Robot Grasping Abstract: Despite 50 years of research, robots remain remarkably clumsy, limiting their reliability for warehouse order fulfillment, robot-assisted surgery, and home decluttering. The First Wave of grasping research is purely analytical, applying variations of screw theory to exact knowledge of pose, shape, and contact mechanics. The Second Wave is purely empirical: end-to-end hyperparametric function approximation (aka Deep Learning) based on human demonstrations or time-consuming self-exploration. A "New Wave" of research considers hybrid methods that combine analytic models with stochastic sampling and Deep Learning models. I'll present this history with new results from our lab on grasping diverse and previously-unknown objects. Bio: Ken Goldberg is the William S. Floyd Distinguished Chair in Engineering at UC Berkeley and an award-winning roboticist, filmmaker, artist and popular public speaker on AI and robotics. Ken trains the next generation of researchers and entrepreneurs in his research lab at UC Berkeley; he has published over 300 papers, 3 books, and holds 9 US Patents. Ken’s artwork has been featured in 70 art exhibits including the 2000 Whitney Biennial. He is a pioneer in technology and artistic visual expression, bridging the “two cultures” of art and science. With unique skills in communication and creative problem solving, invention, and thinking on the edge, Ken has presented over 600 invited lectures at events around the world. Ken has been interested in robots, rockets, and rebels since he was a kid. He’s skeptical about claims that humans are on the verge of being replaced by Superintelligent machines yet optimistic about the potential of technology to improve the human condition. Ken developed the first provably complete algorithm for part feeding and the first robot on the Internet. In 1995 he was awarded the Presidential Faculty Fellowship and in 2005 was elected IEEE Fellow: "For contributions to networked telerobotics and geometric algorithms for automation." Ken founded UC Berkeley's Art, Technology, and Culture public lecture series in 1997 serves on the Advisory Board of the RoboGlobal Exchange Traded Fund. Ken is Chief Scientist at Ambidextrous Robotics and on the Editorial Board of the journal Science Robotics. He served as Chair of the Industrial Engineering and Operations Research Department and co-founded the IEEE Transactions on Automation Science and Engineering. Short documentary films he co-wrote were selected for Sundance and one was nominated for an Emmy Award. He lives in the Bay Area and is madly in love with his wife, filmmaker and Webby Awards founder Tiffany Shlain, and their two daughters.

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CS & ECE Seminar: Sarita Adve, Wed. Feb 1 at 4:30
by Emily C. Lawrence 30 Jan '23

30 Jan '23

Speaker: Sarita Adve, University of Illinois at Urbana-Champaign Title: Enabling the Immersive Era of Computing Day: Wednesday, February 1, 2023 Time: 4:30 pm EST Location: CS 105 Host: Kai Li & Sharad Malik Abstract: Computing is on the brink of a new immersive era. Recent innovations in virtual/augmented/mixed reality (extended reality or XR) show the potential for a new immersive modality of computing that will transform most human activities and change how we design, program, and use computers. There is, however, an orders of magnitude gap between the power/performance/quality-of-experience (QoE) attributes of current and desirable immersive systems. Bridging this gap requires an ambitious systems research agenda that is end-to-end QoE driven, is based on hardware-software-algorithm co-design, and spans the end-user device, edge, and cloud. To enable this agenda, my group has built ILLIXR (Illinois eXtended Reality testbed), an open source XR system and testbed for end-to-end immersive systems research. I will describe ILLIXR and the research it has enabled across the computing stack. I will also discuss the industry supported ILLIXR consortium launched to democratize XR systems research, development, and benchmarking, and the Center for Immersive Computing at Illinois spanning immersive hardware to applications research and education. Bio: Sarita Adve is the Richard T. Cheng Professor of Computer Science at the University of Illinois at Urbana-Champaign where she directs the Center for Immersive Computing. Her research interests span the system stack, ranging from hardware to applications. Her work on the data-race-free, Java, and C++ memory models forms the foundation for memory models used in most hardware and software systems today. Recently, her group released ILLIXR (Illinois Extended Reality testbed), an open-source extended reality system and research testbed, and launched the ILLIXR consortium to democratize XR research, development, and benchmarking. She is also known for her work on heterogeneous systems and software-driven approaches for hardware resiliency. She is a member of the American Academy of Arts and Sciences, a fellow of the ACM and IEEE, and a recipient of the ACM/IEEE-CS Ken Kennedy award. As ACM SIGARCH chair, she co-founded the CARES movement, winner of the CRA distinguished service award, to address discrimination and harassment in Computer Science research events. She received her PhD from the University of Wisconsin-Madison and her B.Tech. from the Indian Institute of Technology, Bombay. *This talk will NOT be recorded or live streamed.

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Zhuqi Li will present his FPO "Cross-layer Optimization for Video Delivery on Wireless Networks" on Thursday, January 26, 2023 at 3pm in CS 402
by Nicki Mahler 20 Jan '23

20 Jan '23

Zhuqi Li will present his FPO "Cross-layer Optimization for Video Delivery on Wireless Networks" on Thursday, January 26, 2023 at 3pm in CS 402 The members of his committee are as follows: Examiners: Kyle Jamieson (adviser), Ravi Netravali, and Jennifer Rexford Readers: Amit Levy and Victor Bahl (Microsoft) A copy of his thesis will be available before the FPO upon request. Please email gradinfo(a)cs.princeton.edu if you would like a copy of the thesis. Everyone is invited to attend his talk. Abstract follows below: Mobile video applications have gained increasing popularity and become part of everyone’s daily experience. The quality of video has a significant impact on both the quality of users’ experience for video streaming and the accuracy of video analytic systems, which further impact the application revenue. The challenge to building a consistently high-quality video delivery system lies in two aspects. On the application side, the emerging new video applications are evolving to become more user-interactive, where existing prefetch and buffering algorithms cannot work properly. On the network side, the wireless network itself is fundamentally dynamic and unreliable due to the multipath effect and interference on the wireless channel. In this thesis, we present cross-layer optimizations from the application layer, network layer, and physical layer to improve the quality of video streaming over wireless network with the design and implementation of the following systems: Dashlet, a short video streaming system tailored for a high quality of experience by adapting to dynamic user actions. Dashlet proposes a novel out-of-order video chunk pre-buffering mechanism that leverages a simple, non machine learning-based model of users’ swipe statistics to determine the pre-buffering order and bitrate. Spider, a multi-hop, millimeter-wave (mmWave) wireless relay network design to maximize the video analytic accuracy for the delivered video. Spider integrates a low-latency Wi-Fi control plane with a mmWave relay data plane, allowing agile re-routing around blockages. Spider proposes a novel video bit-rate allocation algorithm coupled with a scalable routing algorithm that maximizes application-layer video analytics accuracy. LAIA, a system to programmable control the wireless channel so that the wireless network can achieve consistently high throughput for robust video delivery. With the programmable interface to control the wireless channel, LAIA can improve wireless channels on the fly for single- and multi-antenna links, as well as nearby networks operating on adjacent frequency bands. Putting it together, this thesis demonstrates a set of optimizations in different layers in through network stack for building a high quality and robustness wireless video delivery system. The extensive evaluation demonstrates a significant improvement on both quality of experience for video streaming and accuracy for video analytics.

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Xingyuan Sun will present his FPO "Gradient-Based Shape Optimization for Engineering Using Machine Learning" on Friday, February 17, 2023 at 1:00 PM in CS 402 and via Zoom.
by CS Grad Department 20 Jan '23

20 Jan '23

Xingyuan Sun will present his FPO "Gradient-Based Shape Optimization for Engineering Using Machine Learning" on Friday, February 17, 2023 at 1:00 PM in CS 402 and via Zoom. Location: CS 402, Zoom Link: [ https://princeton.zoom.us/j/98360015495 | https://princeton.zoom.us/j/98360015495 ] . The members of Xingyuan’s committee are as follows: Examiners: Ryan Adams (Co-Adviser), Szymon Rusinkiewicz (Co-Adviser), Olga Russakovsky Readers: Sigrid Adriaenssens, Felix Heide A copy of his thesis is available upon request. Please email gradinfo(a)cs.princeton.edu if you would like a copy of the thesis. Everyone is invited to attend his talk. Abstract follows below: Shape design problems are important in engineering, e.g., trajectory planning for robot arms, material distribution optimization, etc. However, existing works usually solve these tasks without the help of gradients, whose efficiency can be limited. We formalize design problems as constrained optimization tasks and propose to use gradient-based optimizers with automatic differentiation to solve them. Specifically, we use the adjoint method when the underlying physical process can be characterized by PDEs. In Chapter 2, we solve for extruder paths of 3D printing that can compensate for the deformation caused by the fiber printing process. As the printing process is complex and difficult to model, we create a synthetic dataset and fit it using a neural network to get a differentiable surrogate of the printing simulator. We further speed up the optimization process by using a neural network to amortize it, sacrificing a bit of accuracy but getting much faster, real-time inferences. In Chapter 3, we study the task of fiber path planning, figuring out where to lay reinforcing fibers in plastic for 3D printing, maximizing stiffness of the composite. We build a simulator by solving the linear elastic equations and use the adjoint method for gradient calculation and BFGS for fiber path optimization. In Chapter 4, we investigate the problem of dovetail joint shape optimization for stiffness. To model the contact between two parts of a joint, we build a simulator by alternatively solving one side of the joint while fixing the other side. We use the adjoint method for gradient computation and gradient descent for optimization. All methods across the projects are tested both in simulation and real-world experiments, showing our approach produces high-quality designs, and also the amortized approach provides real-time inference while achieving a comparable design quality.

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