- talks - lists.cs.princeton.edu

Join us TODAY for AI² Startup Founders Series Livestream event featuring Rocky Yu from AGI House
by Emily C. Lawrence 19 Feb '25

19 Feb '25

Please join us TODAY for AI² Startup Founders Series Livestream event featuring Rocky Yu from [ https://agihouse.org/ | AGI House ] . AGI House: “Founding Story and Mission” Wednesday, February 19th, 2025, 4:30PM EST [ https://www.youtube.com/@PrincetonAI2 | https://www.youtube.com/@PrincetonAI2 ] AGI House is a premier hub for AI innovation located in San Francisco, bringing together leading researchers, industry pioneers, and visionary founders to advance Artificial General Intelligence. Through its AGI Transformation event series, hackathons, exclusive gatherings, and guest speaker sessions featuring AI leaders such as Jeff Dean and Sam Altman, AGI House fosters a world-class community driving AI progress. AGI House operates a venture fund and fellowship program, investing in some of the most promising GenAI startups, including early rounds of Voyage AI and Pika. Rocky Yu is the founder and CEO of [ https://agihouse.org/ | AGI House(Link is external) ] , a factory designed to build AI startups. He founded several companies in Silicon Valley, including Piki Inc, a platform for AI/AR storytelling, and 35CFund. He launched most recently AGI House Ventures. Join the AI for Accelerating Invention mailing list to receive updates about upcoming events and opportunities: [ https://princeton.us13.list-manage.com/subscribe?u=844cda4548afd4e4c6dd5e1b… | link ] .

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DeCenter Seminar - Elaine Shi TODAY at 3:30pm
by Emily C. Lawrence 19 Feb '25

19 Feb '25

TODAY, Wednesday, February 19th, at 3:30 PM , the DeCenter Seminar Series continues with Elaine Shi , a professor of Computer Science and Electrical & Computer Engineering at Carnegie Mellon University. She is interested in cryptography, game theory, algorithms, and the foundations of blockchains. She will present a seminar titled "Decentralized Mechanism Design: Cryptography Meets Game Theory." The event will take place in the Computer Science Building Room 105 . Abstract: In classical auction design, we take it for granted that the auctioneer is trusted and always implements the auction’s rules honestly. This assumption, however, no longer holds in modern auctions based on blockchains, or those mediated by third-party platforms such as Google. For example, in blockchain-based auctions, the consensus nodes that partly serve as the auctioneer are incentivized to deviate from honest behavior if profitable. Third-party auction platforms such as Google have also been involved in high-profile anti-trust lawsuits for manipulating their auctions. In this talk, I will describe our recent work on decentralized mechanism design, where we aim to build a new scientific foundation for emerging auctions that are not backed by a trusted auctioneer. I will characterize the mathematical landscape of decentralized mechanism design, by showing several infeasibility and feasibility results. I will also highlight how cryptography can play an essential role for bypassing impossibility results in decentralized mechanism design, leading to a new class of auctions that not only incentivize bidders to act honestly, but also incentivize the auctioneer to play by the book. Bio: Elaine Shi is a Professor at CMU. Prior to joining CMU, she was an assistant professor in UMD and an associate professor in Cornell. Her research interests include cryptography, security, algorithms, game theory, and foundations of blockchains. Elaine’s work has successfully transitioned cryptography and privacy algorithms from on-paper theory to large-scale real-world deployment. For example, her Oblivious RAM algorithm now serves as the backbone of Signal’s private contact discovery service and has also been implemented by Meta. Her differential privacy algorithm has been improved and implemented by companies such as Google and JP Morgan and is a core to Google’s Spanish Gboard. Elaine is a Packard Fellow, a Sloan Fellow, and an ACM Fellow. She has also received several awards such as an ONR YIP award, the NSF CAREER award, and various best paper awards such as the CCS Test of Time award, the NSA Best Scientific Cybersecurity paper, Top Picks in Hardware and Embedded Security, ASPLOS best paper, and others. We hope to see you there!

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Indu Panigrahi will present "Interactivity x Explainability: Toward Understanding How Interactivity Can Improve Computer Vision Explanations" on Thurs. February 27, 2025 at 12:30pm in CS 402.
by Gradinfo 18 Feb '25

18 Feb '25

Indu Panigrahi will present "Interactivity x Explainability: Toward Understanding How Interactivity Can Improve Computer Vision Explanations" on Thurs. February 27, 2025 at 12:30pm in CS 402. Adviser: Parastoo Abtahi; Reader: Ruth Fong * Date : Thursday, February 27th, 2025 * Time : 12:30pm * Location : CS 402 * Title : Interactivity x Explainability: Toward Understanding How Interactivity Can Improve Computer Vision Explanations * Abstract : Explanations for computer vision models are important tools for interpreting how the underlying models work. However, they have traditionally been presented in static formats, which pose challenges for users, including information overload, a gap between semantic and pixel-level information, and limited opportunities for exploration. We investigate interactivity as a mechanism for tackling these issues in three common explanation types: heatmap-based, concept-based, and prototype-based explanations. We conducted a study (N=24), using a bird identification task, involving participants with diverse technical and domain expertise. We found that while interactivity enhances user control, facilitates how users interpret information, and allows users to expand their understanding of the model and explanation, it also introduces new challenges. To address these, we provide design recommendations for interactive computer vision explanations, including carefully selected default views, constrained output spaces, and optionality. * Additional note : Please try to email Indu at [ mailto:indup@princeton.edu | indup(a)princeton.edu ] beforehand if you plan on attending so that we can have a rough headcount.

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Ilya Chugunov will present his FPO "Neural Field Representations of Mobile Computational Photography" on Friday, February 21, 2025 at 2:00 PM in CS 302.
by CS Grad Department 11 Feb '25

11 Feb '25

Ilya Chugunov will present his FPO " Neural Field Representations of Mobile Computational Photography " on Friday, February 21, 2025 at 2:00 PM in CS 302 . Location: CS 302 The members of Ilya ’s committee are as follows: Examiners: Felix Heide (Adviser), Szymon Rusinkiewicz , Jia Deng Readers: Adam Finkelstein , Ellen Zhong A copy of his thesis is available upon request. Please email gradinfo(a)cs.princeton.edu if you would like a copy of the thesis. Everyone is invited to attend his talk. Abstract follows below: Over the past two decades, mobile imaging has experienced a profound transformation, with cell phones rapidly eclipsing all other forms of digital photography in popularity. Today’s cell phones are equipped with a diverse range of imaging technologies– laser depth ranging, multi-focal camera arrays, and split-pixel sensors alongside non-visual sensors such as gyroscopes, accelerometers, and magnetometers. This, combined with on-board integrated chips for image and signal processing, makes the cell phone a versatile pocket-sized computational imaging platform. Parallel to this, we have seen in recent years how neural fields– small neural networks trained to map continuous spatial input coordinates to output signals– enable the reconstruction of complex scenes without explicit data representations such as pixel arrays or point clouds. In this thesis, I demonstrate how carefully designed neural field models can compactly represent complex geometry and lighting effects. Enabling applications such as depth estimation, layer separation, and image stitching directly from collected in-the-wild mobile photography data. These methods outperform state-of-the-art approaches without relying on complex pre-processing steps, labeled ground truth data, or machine learning priors. Instead, they leverage well constructed, self-regularized models that tackle challenging inverse problems through stochastic gradient descent, fitting directly to raw measurements from a smartphone.

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Divya Raghunathan will present her FPO "Layered Abstractions for Network Verification and Performance Analysis" on February 24, 2025 at 3pm in CS 302 (CORRECTION)
by Gradinfo 10 Feb '25

10 Feb '25

CORRECTION: Divya Raghunathan will present her FPO "Layered Abstractions for Network Verification and Performance Analysis" on February 24, 2025 at 3pm in CS 302. Her committee is as follows: Examiners: Aarti Gupta (Adviser), Zachary Kincaid, and Mae Milano Readers: David Walker and Maria Apostolaki Title: "Formal Methods for Networks: Verification, Compilation, and Performance Analysis" Abstract: The scale and complexity of computer networks make their correct operation and analysis challenging. Networks are difficult to configure correctly: router configuration bugs are common, and often cause severe outages or security breaches. Network management tasks (e.g., ensuring compliance with service-level agreements) are challenging, given the diversity of network traffic and limited monitoring information. Formal verification provides tools to improve network reliability, but large network sizes and the vast space of network environments make scalable verification challenging, especially for approaches using Satisfiability Modulo Theories (SMT). Abstractions can improve verification scalability by simplifying the system being verified. Abstractions that over-approximate system behavior enable sound verification that never misses property violations, but could report spurious violations (false positives). Designing effective abstractions that enable scalable verification but rarely report false positives is challenging. This thesis introduces novel abstractions and verification methods for network control plane verification and network performance analysis. Our abstract verification procedures are effective (low false positive rate) and significantly improve verification scalability over state-of-the-art. Our network control plane verifier, ACORN, checks routing-related properties like reachability given network router configurations. ACORN leverages our novel Nondeterministic Routing Choice (NRC) abstractions to simplify the network control plane. We prove that the NRC abstractions are sound for verification, i.e., never miss property violations. With our NRC abstractions, ACORN successfully verifies reachability for up to 28000 routers (in a FatTree topology) within an hour, while state-of-the-art tools do not scale beyond a few thousand routers. Our network performance analysis approach, QuASI, answers performance queries (e.g., burst occurrence) under given measurements. QuASI's first layer, QuASI-approx, uses three novelties: our enqueue-rate abstraction, our reduction over abstract packet traces, and an efficient matrix-based consistency check. We prove QuASI-approx will never incorrectly report a query is unsatisfiable. QuASI's second layer uses SMT constraints to model switch behavior under measurements, leveraging the enqueue-rate abstraction to speed up verification without loss of precision for supported queries. QuASI answers queries up to six orders of magnitude faster than an existing performance analysis tool.

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Divya Raghunathan will present her FPO "Formal Methods for Networks: Verification, Compilation, and Performance Analysis" on February 24, 2025 at 3pm in CS 302.
by Nicki Mahler 10 Feb '25

10 Feb '25

Divya Raghunathan will present her FPO "Formal Methods for Networks: Verification, Compilation, and Performance Analysis" on February 24, 2025 at 3pm in CS 302. Her committee is as follows: Examiners: Aarti Gupta (Adviser), Zachary Kincaid, and Mae Milano Readers: David Walker and Maria Apostolaki Title: "Formal Methods for Networks: Verification, Compilation, and Performance Analysis" Abstract: The scale and complexity of computer networks make their correct operation and analysis challenging. Networks are difficult to configure correctly: router configuration bugs are common, and often cause severe outages or security breaches. Network management tasks (e.g., ensuring compliance with service-level agreements) are challenging, given the diversity of network traffic and limited monitoring information. Formal verification provides tools to improve network reliability, but large network sizes and the vast space of network environments make scalable verification challenging, especially for approaches using Satisfiability Modulo Theories (SMT). Abstractions can improve verification scalability by simplifying the system being verified. Abstractions that over-approximate system behavior enable sound verification that never misses property violations, but could report spurious violations (false positives). Designing effective abstractions that enable scalable verification but rarely report false positives is challenging. This thesis introduces novel abstractions and verification methods for network control plane verification and network performance analysis. Our abstract verification procedures are effective (low false positive rate) and significantly improve verification scalability over state-of-the-art. Our network control plane verifier, ACORN, checks routing-related properties like reachability given network router configurations. ACORN leverages our novel Nondeterministic Routing Choice (NRC) abstractions to simplify the network control plane. We prove that the NRC abstractions are sound for verification, i.e., never miss property violations. With our NRC abstractions, ACORN successfully verifies reachability for up to 28000 routers (in a FatTree topology) within an hour, while state-of-the-art tools do not scale beyond a few thousand routers. Our network performance analysis approach, QuASI, answers performance queries (e.g., burst occurrence) under given measurements. QuASI's first layer, QuASI-approx, uses three novelties: our enqueue-rate abstraction, our reduction over abstract packet traces, and an efficient matrix-based consistency check. We prove QuASI-approx will never incorrectly report a query is unsatisfiable. QuASI's second layer uses SMT constraints to model switch behavior under measurements, leveraging the enqueue-rate abstraction to speed up verification without loss of precision for supported queries. QuASI answers queries up to six orders of magnitude faster than an existing performance analysis tool. (edited) The scale and complexity of computer networks make their correct operation and analysis challenging. Networks are difficult to configure correctly: router configuration bugs are common, and often cause severe outages or security breaches. Network management tasks (e.g., ensuring compliance with service-level agreements) are challenging, given the diversity of network traffic and limited monitoring information. Formal verification provides tools to improve network reliability, but large network sizes and the vast space of network environments make scalable verification challenging, especially for approaches using Satisfiability Modulo Theories (SMT). Abstractions can improve verification scalability by simplifying the system being verified. Abstractions that over-approximate system behavior enable sound verification that never misses property violations, but could report spurious violations (false positives). Designing effective abstractions that enable scalable verification but rarely report false positives is challenging. This thesis introduces novel abstractions and verification methods for network control plane verification and network performance analysis. Our abstract verification procedures are effective (low false positive rate) and significantly improve verification scalability over state-of-the-art. Our network control plane verifier, ACORN, checks routing-related properties like reachability given network router configurations. ACORN leverages our novel Nondeterministic Routing Choice (NRC) abstractions to simplify the network control plane. We prove that the NRC abstractions are sound for verification, i.e., never miss property violations. With our NRC abstractions, ACORN successfully verifies reachability for up to 28000 routers (in a FatTree topology) within an hour, while state-of-the-art tools do not scale beyond a few thousand routers. Our network performance analysis approach, QuASI, answers performance queries (e.g., burst occurrence) under given measurements. QuASI's first layer, QuASI-approx, uses three novelties: our enqueue-rate abstraction, our reduction over abstract packet traces, and an efficient matrix-based consistency check. We prove QuASI-approx will never incorrectly report a query is unsatisfiable. QuASI's second layer uses SMT constraints to model switch behavior under measurements, leveraging the enqueue-rate abstraction to speed up verification without loss of precision for supported queries. QuASI answers queries up to six orders of magnitude faster than an existing performance analysis tool.

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Yikai Wu will present his General Exam "Unrealized Expectations: Comparing AI Methods vs Classical Algorithms for Maximum Independent Set" on Wednesday, February 12, 2025 at 1:30 PM in CS 401 and via zoom.
by CS Grad Department 07 Feb '25

07 Feb '25

Yikai Wu will present his General Exam "Unrealized Expectations: Comparing AI Methods vs Classical Algorithms for Maximum Independent Set" on Wednesday, February 12, 2025 at 1:30 PM in CS 401 and via zoom. Zoom Link: https://princeton.zoom.us/j/97198300462 Committee Members: Sanjeev Arora (advisor), Elad Hazan, Pravesh Kothari Abstract: AI methods, especially generative models and reinforcement learning, have recently been applied to combinatorial optimization (CO) problems, especially NP-hard ones. This paper compares such GPU-based methods with classical CPU-based methods on Maximum Independent Set (MIS). Experiments on standard graph families show that AI-based algorithms fail to outperform and, in many cases, to even match the solution quality of classical solvers. The GPU-based methods often perform similarly to the simplest classical heuristic, degree-based greedy. Even when allowing ML-based methods to improve their solutions with post-processing techniques like local search, their performance remains inferior to that of CPU-based solvers. We develop a new mode of analysis to reveal that step-by-step AI methods, e.g. LTFT (which is based on GFlowNets), end up reasoning similarly to classical degree-based greedy approaches. We also find that CPU-based algorithms, notably Kamis, have strong performance on sparse random graphs, which appears to surpass a conjectured upper bound for polynomial algorithms. Reading List: https://docs.google.com/document/d/10wj4bZsLdrMIU402he0aC6HkxVSE_v9ujmnVgzz… Everyone is invited to attend the talk, and those faculty wishing to remain for the oral exam following are welcome to do so.

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ECE SEMINAR: Alon Kipnis from Reichman University, Friday, February 7 at 2pm
by Emily C. Lawrence 07 Feb '25

07 Feb '25

ECE SEMINAR Speaker: [ https://www.runi.ac.il/en/faculty/akipnis/ | Alon Kipnis ] , School of Computer Science at Reichman University Title: [ https://ece.princeton.edu/events/information-theoretic-approach-detecting-e… | An Information-Theoretic Approach for Detecting Edits in AI-Generated Text ] Day: Friday, February 7 Time: 2:00 PM Location: Computer Science 105 *Refreshments will be available. Host: Andrea Goldsmith, Dean, School of Engineering and Applied Science Abstract: We propose a method to determine whether a given article was written entirely by a generative language model or perhaps contains edits by a different author, possibly a human. Our process involves multiple tests for the origin of individual sentences or other pieces of text and combining these tests using a method sensitive to alternatives in which non-null effects are few and scattered across the text in unknown locations. Interestingly, this method is also useful for identifying pieces of text suspected to contain edits. We demonstrate the effectiveness of the method in detecting edits through extensive evaluations using real data and provide an information-theoretic analysis of the factors affecting its success. In particular, we discuss optimality properties under a theoretical framework for text editing saying that sentences are generated mainly by the language model, except perhaps for a few sentences that might have originated via a different mechanism. Our analysis raises several interesting research questions at the intersection of information theory and data science. Bio: Alon Kipnis is a Senior Lecturer (Assistant Professor) at the School of Computer Science at Reichman University. He received a PhD in electrical engineering from Stanford University in 2017. Between 2017-2021 he was a postdoctoral research scholar and a lecturer at the Department of Statistics at Stanford, advised by David Donoho. Dr. Kipnis' research combines mathematical statistics, information theory, and data science with applications to the analysis of noisy and sparse data in high dimensions, time-series, and text. He is the recipient of numerous fellowships and awards, including the Koret foundation postdoctoral fellowship, Stanford's electrical engineering department fellowship, and a prize from the Wolf Foundation.

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PPPL Seminar - Sunita Chandrasekaran, January 30, 2:45 PM
by Emily C. Lawrence 29 Jan '25

29 Jan '25

The Princeton Plasma Physics Laboratory's Computational Science Department is pleased to announce. [ https://sites.google.com/d/13WaEf9N_dRV6D56spW_7SebByoF71VQe/p/1u7bBH2T5Z_D… | The Artificial Scientist - Leveraging In-transit Machine Learning for Plasma Simulations ] Presented by: Sunita Chandrasekaran , Associate Professor , University of Delaware Thursday, January 30, 2025, 2:45 PM Richard Hawryluk Conference Room, B31 8, [ https://pppl.zoom.us/j/91058597465?pwd=bLV9xHE4WFbznMBZFh45MJl4jiZ1pg.1 | Zoom ] Host: Shantenu Jha Abstract: With the rapid advancements in the computer architecture space, the migration of legacy applications to new architectures remains a continuous challenge. To effectively navigate this ever-evolving hardware landscape, software and toolchains must evolve in tandem, staying ahead of the curve in terms of architectural innovation. While this synchronization between hardware and software is inherently complex, it is essential for fully harnessing the potential of advanced hardware platforms. In this context, a marriage between HPC and AI is gaining increasing prominence. By effectively orchestrating the workflow of HPC and AI, we can not only accelerate scientific progress but also achieve significant gains in computational efficiency. One promising strategy to further optimize large-scale workflows is to stream simulation data directly into machine learning (ML) frameworks. This approach bypasses traditional file system bottlenecks, allowing for the transformation of data in transit— asynchronously with both the simulation process and model training. This talk will explore these strategies in detail, demonstrating the synergy between hardware innovation and software adaptation. Using real-world scientific applications as case study, Plasma-in-Cell on GPU, i.e. PIConGPU will showcase how these techniques can be applied at scale to drive both scientific and computational advancements. Sponsorship of an event does not constitute institutional endorsement of external speakers or views presented.

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Yun Cheng will present her General Exam "Generalizing from SIMPLE to HARD Visual Reasoning: Can We Mitigate Modality Imbalance in VLMs?" on Wednesday, January 22, 2025 at 10:00 AM in CS 402 and via zoom.
by CS Grad Department 17 Jan '25

17 Jan '25

Yun Cheng will present her General Exam "Generalizing from SIMPLE to HARD Visual Reasoning: Can We Mitigate Modality Imbalance in VLMs?" on Wednesday, January 22, 2025 at 10:00 AM in CS 402 and via zoom. Zoom link: https://princeton.zoom.us/j/91346752488 Committee Members: Sanjeev Arora (advisor), Danqi Chen, Benjamin Eysenbach Abstract: While Vision Language Models (VLMs) are impressive in tasks such as visual question answering (VQA) and image captioning, their ability to apply multi-step reasoning to images has lagged, giving rise to perceptions of modality imbalance or brittleness. Towards systematic study of such issues, we introduce a synthetic framework for assessing the ability of VLMs to perform algorithmic visual reasoning (AVR), comprising three tasks: Table Readout, Grid Navigation, and Visual Analogy. Each has two levels of difficulty, SIMPLE and HARD, and even the SIMPLE versions are difficult for frontier VLMs. We seek strategies for training on the SIMPLE version of tasks that improve performance on the corresponding HARD task, i.e., S2H generalization. This synthetic framework, where each task also has a text-only version, allows a quantification of the modality imbalance and how it is impacted by training strategy. Ablations highlight the importance of explicit image-to-text conversion in promoting S2H generalization when using auto-regressive training. We also report results of mechanistic study of this phenomenon, including a measure of gradient alignment that seems to identify training strategies that promote better S2H generalization. Reading List: https://docs.google.com/document/d/1DbFfQZyCJb3HSYLvhy2SZ9voh_IN_6JZXcrFoiy… Everyone is invited to attend the talk, and those faculty wishing to remain for the oral exam following are welcome to do so.

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