Can anyone tell me what the PCI interface on future IXP1200
processors are likely look like? (Without disclosing confidential
information, of course.)
Specifically, I'm curious to know if we might see a sustained rate
of 400 MB/s from the PCI bus (or PCIX) to the SDRAM on a next
generation IXP1200 (say, within 6 to 12 months). To do this, the
IXP1200 would need either a full blown 64-bit/66 MHz PCI bus or a
PCIX bus.
-Scott
