November 2001 - ixp1200 - lists.cs.princeton.edu

IXP1200 for TCP termination
by Vishal Anand 19 Dec '01

19 Dec '01

Hi, We have 2 IXP12EB evaluation kit for the IXP1200 processor. Was curious if anybody has ever done a feasibility study for doing TCP termination on the IXP. Theoretically it would seem that the Micro engines are an ideal choice for executing the TCP Fast Path code, while the ARM could run the Slow Path. Would appreciate any feedback if somebody did any work in this direction. Regards, -Vishal Anand (San Jose State University, CA) _________________________________________________________________ Get your FREE download of MSN Explorer at http://explorer.msn.com/intl.asp

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Administration: Updated Info
by Scott C. Karlin 11 Dec '01

11 Dec '01

I have updated the "info" file for the mailing list (see below). This is the file which is sent to new subscribers to the list. We originally established this list to link the CS and EE departments of the schools participating in Intel's IXA University Program. One particular project which grew out of this program is the VERA work being done at Princeton. Because we are getting requests for more information from people outside of academia, we have decided to expand the membership of the list and to explicitly add VERA as a discussion topic for the list. In addition to expanding the scope, we have made a few additional changes to the mailing list, including: * We've added reminders that this is not an Intel support list and that one should not post proprietary information. * We have disabled the "who" command. This is to prevent anyone from getting a list of subscribers. Scott Karlin OVERVIEW -------- The purpose of this list is to facilitate discussion on the topics of: (1) the IXP1200 Network Processor including its Ethernet Evaluation System, and (2) Princeton's VERA software. See http://www.cs.princeton.edu/nsg/vera/ This list is not sponsored by Intel and is not a substitute for Intel technical support. POSTING MESSAGES ---------------- To send mail to the people on the list, send your ASCII message (not HTML) to ixp1200(a)cs.princeton.edu Note that this list has been setup so that replies go to the entire list. This is to encourage discussion on the list. GUIDELINES ---------- While informative announcements of products or services that benefit most subscribers are allowed, blatant commercial advertising is not. Please do not clutter the archive with HTML messages or attachments. Use plain ASCII text only. (Place code, papers, etc., on a WWW or FTP site and provide a URL reference instead.) This is an "open" discussion forum in the sense that proprietary information should not be posted to the list. Note that this is a "closed" discussion forum in the sense that we will continue to manually approve submission requests and that we retain the right to unsubscribe abusers of the list. UNSUBSCRIBING ------------- See "unsubscribe" in the COMMANDS section below. ARCHIVE ------- All postings to this list are archived by month into files having extensions which represent the year and month of the archives. See "index" and "get" in the COMMANDS section below for access. COMMANDS -------- Majordomo handles the ixp1200 mailing list. To "execute" a command, send mail to majordomo(a)cs.princeton.edu (NOT ixp1200(a)cs.princeton.edu) Include the command in the *body* of the message (the subject line is ignored and may be blank). Commands include: unsubscribe ixp1200 remove yourself from this list index ixp1200 get a list of available archive files get ixp1200 <filename> retrieve an archive file. info ixp1200 get the most current version of this message (works only if you are on the list) subscribe ixp1200 request to be added to this list (must be approved by the list admin) help general help from Majordomo Note that the "who" command has been disabled. ADMINSTRATOR ------------ If you have administrative questions or comments about the list, send them to ixp1200-request(a)cs.princeton.edu LAST UPDATED ------------ November 27, 2001

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IXP Simulator Query - passage of packets to Microengines
by S Murali 30 Nov '01

30 Nov '01

Hi All, I am presently working on IXP Simulator which comes with the CD's of Intel. The issue is sending packets to the microengines. As far as I know there are 2 ways of passing packets to the microengines a) Using the IX Bus which comes with the simulator. b) Passing packets from outside the Workbench ( Foreign Model ). I am sucessful in passing packets from the IX Bus, but do not have any idea of sending packets from outside the Workbench ( i.e. from the network ) so that I can manipulate the packets going to the IXP. I think this can be achieved by creation of some DLL's on Windows ( as specified in the manual ) which can be linked to the Simulator. Can any one out there give me some guidance of how to generate these DLL's and the code ?? Or if you already have some sample code which works this way, can you pass it on to me ?? The idea is to send and receive packets from the network (another m/c) to the Simulator. If these is any other method by which we can achieve this, pls specify. Thanks, Regards, -Murali IISc. Bangalore

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VERA Software Announcement
by Scott C. Karlin 26 Nov '01

26 Nov '01

This is to announce that we have setup a web page dedicated to our VERA (Virtual Extensible Router Architecture) software for the Intel IXP1200 Ethernet Evaluation Board and the RAMiX PMC694 Network Interface Card. http://www.cs.princeton.edu/nsg/vera/ Scott Karlin

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RE: [ixp1200] Re: questions on using the IXP1200 in a PC.
by Varnell, Frank 19 Nov '01

19 Nov '01

> 2. Can the StrongArm initiate a DMA transfer directly between its SDRAM > and PC host memory? Any idea what is the rough performance is? Yes. I've only made a couple of measurements: IXP1200 --> Pentium DMA Push 64-byte block 13.10 MByte/sec IXP1200 --> Pentium DMA Push 1500-byte block 49.01 MByte/sec Pentium --> IXP1200 DMA Pull 64-byte block 11.47 MByte/sec Pentium --> IXP1200 DMA Pull 1500-byte block 24.66 MByte/sec The performance is dependant on the CPU speed, the chip set, and the software. Here are some numbers we measured for a PCI loopback test. MCE->ARM->IA(IP layer turnaround)->ARM->MCE (no the code is not available, but it gives you an idea what is possible) Configuration 64 128 190 256 512 1024 1518 STL2(933Mhz), IXP rev C0, 32/33 frame rate 51,030 47,295 43,217 41,470 33,056 23,622 18,506 PCI Throughput 52,254,720 96,860,160 131,379,680 169,861,120 270,794,752 387,022,848 449,473,728 %gig rate 7 11 15 18 28 39 46

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questions on using the IXP1200 in a PC.
by Joon 19 Nov '01

19 Nov '01

Hi All, I'm new to this list and would like to find out a little more about the IXP 1200. I apologize if some of these questions have been asked before. I understand that it is possible to plug the eval board into the 33-MHz 32-bit PCI slot of a standard PC (after some jumper and firmware changes). 1. Can the host PC access the SDRAM, SRAM, registers, etc on the IXP 1200? Is using the IXP1200 in the PCI slot of a PC a supported mode of operation in the first place? 2. Can the StrongArm initiate a DMA transfer directly between its SDRAM and PC host memory? Any idea what is the rough performance is? 3. Can the StrongArm generate interrupts to the host PC over the PCI bus? 4. Can we really expand the SDRAM memory on the IXP1200 to 256MB as listed in the specs? Thanks very much! joon

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SDK 2 and Linux binaries...
by Austen McDonald 13 Nov '01

13 Nov '01

Does the SDK 2 come with a microcode loader already built for arm-linux? That is, if I have an obj file in the ramdisk of the IXP and want to, from a session on the ARM, load this into the uE's is there built code to do that? Austen McDonald austen(a)cc.gatech.edu God does not care about our mathematical difficulties. He integrates empirically. -- Albert Einstein

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RE: [ixp1200] Functionality of A0 Silicon?
by Preston, Charles E 13 Nov '01

13 Nov '01

Another good catch. We'll make sure the updated versions gets posted onto the developer website. -----Original Message----- From: rasit(a)cs.umanitoba.ca [mailto:rasit@cs.umanitoba.ca] Sent: Tuesday, November 13, 2001 9:15 AM To: ixp1200(a)CS.Princeton.EDU Subject: Re: [ixp1200] Functionality of A0 Silicon? Well, the website pointed at by Scott on this list contains a document dated Feb 2001. Why it is so old, then? Rasit According to Preston, Charles E: > > Eric, > > I thought I'd let you catch this before a dozen other people start posting > corrections. The latest spec update version on FDBL is actually August > 2001. > > Carlo > > -----Original Message----- > From: Heaton, Eric D [mailto:eric.d.heaton@intel.com] > Sent: Tuesday, November 13, 2001 8:50 AM > To: 'ixp1200(a)CS.Princeton.EDU' > Subject: RE: [ixp1200] Functionality of A0 Silicon? > > > Loren, > > Check out the latest IXP1200 Spec Update for info on exactly how much > trouble you will have. ;) This document can be found on the IXA SDK, but > if you need a copy, let me know. (The latest is dated June 2001.) > > Eric Heaton > Technical Marketing Engineer > Intel Corporation - NPBU > > > -----Original Message----- > From: lcard [mailto:lcard@win.trlabs.ca] > Sent: Tuesday, November 13, 2001 11:27 AM > To: ixp1200(a)CS.Princeton.EDU > Subject: [ixp1200] Functionality of A0 Silicon? > > > Hello List, > > It would seem that I am lucky enough to have an Evaluation Kit with A0 > Silicon. > > I was able to glean this bit of information from a helpful source: > > > Intel released 3 versions I know of, each less crippled then the > > last. The B0 parts are useable. The A0 parts have a number of serious > > bugs. > > How bad are the A0 parts? > > What are the bugs? > > Thanks in advance! > > -Loren > -- M. Rasit Eskicioglu E-mail: rasit(a)cs.umanitoba.ca Department of Computer Science Phone : (204) 474-8835 (Office) 528 Machray Hall (204) 474-8313 (Messages) University of Manitoba Fax : (204) 474-7609 Winnipeg, Manitoba R3T 2N2 Canada URL : http://www.cs.umanitoba.ca/~rasit

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Re: [ixp1200] Functionality of A0 Silicon?
by rasit＠cs.umanitoba.ca 13 Nov '01

13 Nov '01

Well, the website pointed at by Scott on this list contains a document dated Feb 2001. Why it is so old, then? Rasit According to Preston, Charles E: > > Eric, > > I thought I'd let you catch this before a dozen other people start posting > corrections. The latest spec update version on FDBL is actually August > 2001. > > Carlo > > -----Original Message----- > From: Heaton, Eric D [mailto:eric.d.heaton@intel.com] > Sent: Tuesday, November 13, 2001 8:50 AM > To: 'ixp1200(a)CS.Princeton.EDU' > Subject: RE: [ixp1200] Functionality of A0 Silicon? > > > Loren, > > Check out the latest IXP1200 Spec Update for info on exactly how much > trouble you will have. ;) This document can be found on the IXA SDK, but > if you need a copy, let me know. (The latest is dated June 2001.) > > Eric Heaton > Technical Marketing Engineer > Intel Corporation - NPBU > > > -----Original Message----- > From: lcard [mailto:lcard@win.trlabs.ca] > Sent: Tuesday, November 13, 2001 11:27 AM > To: ixp1200(a)CS.Princeton.EDU > Subject: [ixp1200] Functionality of A0 Silicon? > > > Hello List, > > It would seem that I am lucky enough to have an Evaluation Kit with A0 > Silicon. > > I was able to glean this bit of information from a helpful source: > > > Intel released 3 versions I know of, each less crippled then the > > last. The B0 parts are useable. The A0 parts have a number of serious > > bugs. > > How bad are the A0 parts? > > What are the bugs? > > Thanks in advance! > > -Loren > -- M. Rasit Eskicioglu E-mail: rasit(a)cs.umanitoba.ca Department of Computer Science Phone : (204) 474-8835 (Office) 528 Machray Hall (204) 474-8313 (Messages) University of Manitoba Fax : (204) 474-7609 Winnipeg, Manitoba R3T 2N2 Canada URL : http://www.cs.umanitoba.ca/~rasit

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RE: [ixp1200] Functionality of A0 Silicon?
by Heaton, Eric D 13 Nov '01

13 Nov '01

You got me.. sorry about that guys! Thanks Carlo. ;) --eric h. -----Original Message----- From: Preston, Charles E [mailto:charles.e.preston@intel.com] Sent: Tuesday, November 13, 2001 12:07 PM To: 'ixp1200(a)CS.Princeton.EDU' Subject: RE: [ixp1200] Functionality of A0 Silicon? Eric, I thought I'd let you catch this before a dozen other people start posting corrections. The latest spec update version on FDBL is actually August 2001. Carlo -----Original Message----- From: Heaton, Eric D [mailto:eric.d.heaton@intel.com] Sent: Tuesday, November 13, 2001 8:50 AM To: 'ixp1200(a)CS.Princeton.EDU' Subject: RE: [ixp1200] Functionality of A0 Silicon? Loren, Check out the latest IXP1200 Spec Update for info on exactly how much trouble you will have. ;) This document can be found on the IXA SDK, but if you need a copy, let me know. (The latest is dated June 2001.) Eric Heaton Technical Marketing Engineer Intel Corporation - NPBU -----Original Message----- From: lcard [mailto:lcard@win.trlabs.ca] Sent: Tuesday, November 13, 2001 11:27 AM To: ixp1200(a)CS.Princeton.EDU Subject: [ixp1200] Functionality of A0 Silicon? Hello List, It would seem that I am lucky enough to have an Evaluation Kit with A0 Silicon. I was able to glean this bit of information from a helpful source: > Intel released 3 versions I know of, each less crippled then the > last. The B0 parts are useable. The A0 parts have a number of serious > bugs. How bad are the A0 parts? What are the bugs? Thanks in advance! -Loren

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