June 2001 - ixp1200 - lists.cs.princeton.edu

RE: [ixp1200] IXP-SA simulator
by Heaton, Eric D 29 Jun '01

29 Jun '01

Raj, There is no new simulator for the SA Core from Intel.. and as far as I know there are no plans to create one. THe Developer's Workbench has always come with a cycle accurate simulator for the Core (in addtion to the Microengine simulator -Transactor), but practically, it is way too slow and hence, is turned off by default.. look at the "Configuration" tab under "Simulation->Options.." in the Workbench to enable the model and specify the SA image to run. Alternatively there are other simulators which you may find useful in your development, like the ARMulator, however, these tools are totally separate from the IXA SDK and Intel. --eric h. (intel) -----Original Message----- From: Raj B Krishnamurthy [mailto:rajk@ece.gatech.edu] Sent: Monday, June 25, 2001 3:00 PM To: ixp1200(a)CS.Princeton.EDU Cc: ixp(a)cc.gatech.edu Subject: [ixp1200] IXP-SA simulator hello all: I might be completely misinformed but I remember some news items / talk a little while back about the availability of a IXP1200 StrongArm simulator different from the ucode simulators with the IXP1200 SDK. Any pointers will be appreciated. -- Raj Krishnamurthy Critical Systems Lab GA Tech

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SourceForge project
by Brandewie, Dirk J 26 Jun '01

26 Jun '01

Hi All, As discussed at the IXA university forum last week a SourceForge project has been created to support sharing code and documents with the IXA university participants. Here are the particulars: Project Unix Name: ixp1200 CVS Server: cvs.ixp1200.sourceforge.net Shell/Web Server: ixp1200.sourceforge.net I am the Admin for the project so you will have to bear with me if the project space needs reconfiguration I am learning this on the fly. The first thing I would like to do is solicit input on how we should organize the CVS archive. If you have any past successes using SourceForge I would like to hear from you. Please feel free to send me any comments or concerns you have about the project space. Thanks --Dirk

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IXP-SA simulator
by Raj B Krishnamurthy 25 Jun '01

25 Jun '01

hello all: I might be completely misinformed but I remember some news items / talk a little while back about the availability of a IXP1200 StrongArm simulator different from the ucode simulators with the IXP1200 SDK. Any pointers will be appreciated. -- Raj Krishnamurthy Critical Systems Lab GA Tech

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BOUNCE ixp1200: Admin request (fwd)
by Scott C. Karlin 25 Jun '01

25 Jun '01

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Re: Downloading microcode on linux
by Austen McDonald 25 Jun '01

25 Jun '01

Are you compiling with the -mbig-endian flag? I have included a URL to a package of linux utils that we here at Georgia Tech have built to help us w/ the IXP. I was waiting to release it until I knew that the MAC init worked (it works kindof but may be incomplete). But, the uCode loader works if you want to use it. URL: www.prism.gatech.edu/~gte363v/ixp/ixputils-0.1.tar.gz Austen McDonald austen(a)cc.gatech.edu

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Downloading microcode on linux
by Kevin Crozier 25 Jun '01

25 Jun '01

Hi, We are running the Intel/netwinder big endian linux on our IXP1200. We are having some problems with the microcode loader interpreting byte strings incorrectly (The string the in the microcode is "seen" as _FOUSJBO when the string we are looking for is UOF_OBJS). Of course integers are interpreted correctly, its only byte strings that seem to be a problem. I wondered if anyone else out there has stumbled across this and what the solution was. If anyone has any tips on downloading the microcode from linux they would also be appreciated. Thanks, Kevin -- ==================================================================== Kevin Crozier, Software Engineer Email: kevin(a)teja.com Teja Technologies, Inc. Web: http://www.teja.com/ 2 West Santa Clara Street Voice: (408) 288-2549 San Jose, CA 95113 Fax: (408) 288-2590

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Addendum to Microcode problems...
by Austen McDonald 19 Jun '01

19 Jun '01

I forgot to mention: Im running linux and here is the code that initializes the giga macs: /* mac.c * Change the CSRs inside the of one of the StrongARM's MACs * * Austen McDonald * austen(a)cc.gatech.edu * May 2001 */ #include <asm/arch-ixp1200/hardware.h> #include <asm/arch-ixp1200/ixp1200eb.h> #include <stdio.h> #include <string.h> #define VERSION "v1.2.6" void printHelp() { printf("mac %s, initializes IXP MACs 0 (10/100) and 1 (gigabit)\n",VERSION); printf("Austen McDonald <austen(a)cc.gatech.edu>, Georgia Tech\n\n"); printf("Usage: mac [--help] [--status] [--set mac port addr]\n"); printf(" (no args) intializes and resets both macs (clears hw addrs and counters)\n"); printf(" --status prints the RCV_RDY_LO and _HI registers, hardware addresses,\n"); printf(" and counters. No reset.\n"); printf(" --set sets hardware address for /mac/ /port/ to /addr/, where /addr/\n"); printf(" is a 12 character string of hex digits. No reset.\n"); } void printStatus(volatile unsigned int* mac0, volatile unsigned int* mac1) { int i,j; unsigned char addr; unsigned int x; printf("RCV_RDY_LO: 0x%.8x\n", *(volatile unsigned long*)(MICROENGINE_FBI_BASE+0x400C4)); printf("RCV_RDY_HI: 0x%.8x\n", *(volatile unsigned long*)(MICROENGINE_FBI_BASE+0x400C8)); printf("RCV_RDY_CNT: 0x%.8x\n", *(volatile unsigned long*)(MICROENGINE_FBI_BASE+0x400C0)); printf("XMIT_RDY_CTL: 0x%.8x\n", *(volatile unsigned long*)(MICROENGINE_FBI_BASE+0x400FC)); printf("XMIT_PTR: 0x%.8x\n", *(volatile unsigned long*)(MICROENGINE_FBI_BASE+0x400E0)); printf("MAC 0 (IXF440, 10/100Mbps) HW Addresses:\n"); for(i=0;i<8;i++) { /* eight ports */ printf(" port %i: ",i); for(j=0;j<6;j++) { addr = *(mac0+i*0x400+0x28+j); printf("%.2x",addr); if(j != 5) printf(":"); } i++; printf(" port %i: ",i); for(j=0;j<6;j++) { addr = *(mac0+i*0x400+0x28+j); printf("%.2x",addr); if(j != 5) printf(":"); } printf("\n"); } printf("MAC 1 (IXF1002, Gigabit) HW Addresses:\n"); printf(" port 0: "); for(j=0;j<6;j++) { addr = *(mac1+0x30+j); printf("%.2x",addr); if(j != 5) printf(":"); } printf(" port 1: "); for(j=0;j<6;j++) { addr = *(mac1+0x400+0x30+j); printf("%.2x",addr); if(j != 5) printf(":"); } printf("\n"); /* now for the net statistics */ printf("MAC 0 (IXF440, 10/100Mbps) Status:\n"); for(i=0;i<8;i++) { /* 8 ports */ printf(" port %i: ",i); printf("RX Count: 0x"); x = *(mac0+i*0x400+0x200+0x90); x |= *(mac0+i*0x400+0x200+0x90+1) << 8; x |= *(mac0+i*0x400+0x200+0x90+2) << 16; x |= *(mac0+i*0x400+0x200+0x90+3) << 24; printf("%.8x",x); printf(" TX Count: 0x"); x = *(mac0+i*0x400+0x200); x |= *(mac0+i*0x400+0x200+1) << 8; x |= *(mac0+i*0x400+0x200+2) << 16; x |= *(mac0+i*0x400+0x200+3) << 24; printf("%.8x",x); printf("\n"); } printf("MAC 1 (IXF1002, Gigabit) Status:\n"); for(i=0;i<2;i++) { /* 2 ports */ printf(" port %i: ",i); printf("RX Count: 0x"); x = *(mac1+i*0x400+0x200+0x90); x |= *(mac1+i*0x400+0x200+0x90+1) << 8; x |= *(mac1+i*0x400+0x200+0x90+2) << 16; x |= *(mac1+i*0x400+0x200+0x90+3) << 24; printf("%.8x",x); printf(" TX Count: 0x"); x = *(mac1+i*0x400+0x200); x |= *(mac1+i*0x400+0x200+1) << 8; x |= *(mac1+i*0x400+0x200+2) << 16; x |= *(mac1+i*0x400+0x200+3) << 24; printf("%.8x",x); printf("\n GMII_STT: 0x%.2x%.2x GMII_EXT_STT: 0x%.2x%.2x GPCS_STT: 0x%.2x%.2x", *(mac1+i*0x400+0x53),*(mac1+i*0x400+0x52), *(mac1+i*0x400+0x6f),*(mac1+i*0x400+0x6e), *(mac1+i*0x400+0x71),*(mac1+i*0x400+0x70)); printf("\n AN_PRT_ABL: 0x%.2x%.2x", *(mac1+i*0x400+0x5b),*(mac1+i*0x400+0x5a)); printf("\n"); } } int main(int argc, char** argv) { volatile unsigned int* mac0 = (volatile unsigned int*)(SRAM_SLOW_PORT_BASE); volatile unsigned int* mac1 = (volatile unsigned int*)(SRAM_SLOW_PORT_BASE+0x8000); int i,j; int mac; int port; int hi; short low; char byte[] = "0x00"; if(argc == 2) { if(!strcmp(argv[1],"--status")) printStatus(mac0,mac1); else printHelp(); exit(0); } for(i=1;i<argc;) { if(!strcmp(argv[i],"--set")) { i++; if(argc-i < 3) { printf("Missing arguments to --set\n"); printHelp(); exit(-1); } mac = atoi(argv[i]); if(mac != 0 && mac != 1) { printf("Valid MAC numbers are 0 and 1\n"); printHelp(); exit(-1); } i++; port = atoi(argv[i]); if((mac == 0 && (port < 0 || port > 7)) || (mac == 1 && (port < 0 || port > 1))) { printf("Invalid port number for selected MAC\n"); printHelp(); exit(-1); } i++; if(strlen(argv[i]) != 12) { printf("Invalid address\n"); printHelp(); exit(-1); } for(j=0;j<12;j+=2) { strncpy(byte+2,&(argv[i][j]),2); if(mac == 0) *(mac0+0x400*port+0x28+j/2) = strtol(byte,NULL,16); else *(mac1+0x400*port+0x30+j/2) = strtol(byte,NULL,16); } i++; } else { printHelp(); exit(-1); } printStatus(mac0,mac1); exit(0); } printf("Initializing MAC 0 (IXF440 10/100Mbps)..."); /* reset all registers in MAC 0 */ /* docs (iXF440 datasheet) outline the following process for init: * 1. reset port: write 6 to PORT_CTR, then write 1 to PORT_CTR * 2. init port's regs * 3. write 18 to PORT_CTR */ for(i=0;i<8;i++) { /* eight ports */ /* 1. */ *(mac0+i*0x400+0x5) = 0x06; /* PORT_CTR */ /* control reset, port reset */ *(mac0+i*0x400+0x5) = 0x0; *(mac0+i*0x400+0x5) = 0x01; /* reset counters */ /* wait 100cyc for counter reset */ for(j=0;j<100;j++) j = j + j*0; /* fake the compiler out; otherwise, it will optimize */ /* out this loop. */ /* 2. */ /* IX Bus Config: FFO_BUS: big endian, 64bit bus */ *(mac0+i*0x400+0x12) = 0x03; /* 3. */ *(mac0+i*0x400+0x5) = 0x20; /* PORT_CTR: transmit restart */ *(mac0+i*0x400+0x5) = 0x18; /* PORT_CTR: tx enable, rx enable */ } printf("intialized\n"); printf("Initializing MAC 1 (IXF1002 Gigabit)..."); /* docs (IXF1002 datasheet) outline the following process for init: * 1. reset port: write 7 to PORT_CTR, then write 0 to PORT_CTR * 2. init port's regs * 3. write 18 to PORT_CTR */ for(i=0;i<2;i++) { /* two ports */ /* 1. */ *(mac1+i*0x400+0x4) = 0x07; /* PORT_CTR */ *(mac1+i*0x400+0x4) = 0x00; /* PORT_CTR */ /* 2. */ /* PORT_MODE: GPCS mode on, 64bit bus, no packet status, big endian */ *(mac1+i*0x400+0x24) = 0x0b01; /* TX_RX_PARAM: drop CRC */ // *(mac1+i*0x400+0x27) = 0x08; /* uh, should we do this? */ /* GMII Control Register: reset GPCS, GMII logic */ *(mac1+i*0x400+0x50) = 8000; for(j=0;j<100;j++) j = j + j*0; /* fake the compiler out; otherwise, it will optimize */ /* out this loop. */ /* GMII Control Register: autoneg, restart autoneg */ *(mac1+i*0x400+0x50) = 0x1340; //*(mac1+i*0x400+0x50) = 0x0140; /* 3. */ *(mac1+i*0x400+4) = 0x18; /* PORT_CTR */ } printf("intialized\n"); return 0; }

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Microcode question...
by Austen McDonald 19 Jun '01

19 Jun '01

Attached is bounce.uc and init.h which should receive a 64byte packet from MAC 1 port 0 (gigabit) and send it right back out (it doesnt change the addresses or anything). It doesnt work. Apparently, ctx_arb[start_receive] never returns which means that the recv request never completes or is formatted improperly. Im running bounce.list on uE 0 so Im having the IX bus signal thread 0. If you run it, my seven-segment-display says A1 meaning that it hasnt gotten back form the ctx_arb yet. If it says A2 its gotten back. The other status symbols are in bounce.uc. Id appreciate any help, thanks, Austen McDonald austen(a)cc.gatech.edu God does not care about our mathematical difficulties. He integrates empirically. -- Albert Einstein

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RE: [ixp1200] I tried to connect one ethernet port of IXP1200 to one port of other IXP1200
by Raghunandan, Makaram 18 Jun '01

18 Jun '01

try using a cross-over cable ;) -----Original Message----- From: basavaraj_m(a)dacafe.com [mailto:basavaraj_m@dacafe.com] Sent: Saturday, June 16, 2001 2:26 PM To: ixp1200(a)CS.Princeton.EDU Subject: [ixp1200] I tried to connect one ethernet port of IXP1200 to one port of other IXP1200 Hi, I tried to connect one ethernet port of IXP1200 to one port of other IXP1200 and tried to transmit a packet but the other IXP1200 is not receiving.Can anybody tell me how to transmit a apcket from one IXP1200 port to the other IXP1200 port. _____________________________________________________________ Tired of limited space on Yahoo and Hotmail? Free 100 Meg email account available at http://www.dacafe.com

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RE: [ixp1200] IXP SA-1100 assembly ...
by Sprajc, Barry 18 Jun '01

18 Jun '01

The latest ARM Architecture Reference Manual is an excellent publication for the info you are looking for. FYI - By using this book, I've found all the info needed to write ARM assembly, IRQ handlers, deal with the co-processor ( Enable Cache, etc... ) w/o any prior ARM system level exp. You can order it from FatBrain.com /barry barry.sprajc(a)intel.com -----Original Message----- From: fryman(a)cc.gatech.edu [mailto:fryman@cc.gatech.edu] Sent: Monday, June 18, 2001 9:35 AM To: ixp1200(a)CS.Princeton.EDU Subject: [ixp1200] IXP SA-1100 assembly ... hi all, i was wondering if anyone is using the reference for the IXP with respect to the SA-1100 core? specifically, i'm looking for details of the assembly language (prog. ref. manual), registers, etc. i note that in the documentation that comes with the IXP CD (v1.2) one can find the following: getting_started_armcore.pdf : basic registers available ixp1200_prog_ref_manual.pdf : full registers, but uE-specific ixp1200_hw_ref_manual.pdf : difference between ARMv4 & IXP-SA the hw ref manual states that the basis should be the ARM Architecture Reference Manual other documents state that the reference should be ARM V4 Architecture Reference and i note that the ARM.com web site lists the former, which amazon.com also sells... any comments on if this text is sufficient? other texts needed? cheers, josh fryman fryman(a)cc.gatech.edu

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