- ixp1200 - lists.cs.princeton.edu

Red Hat 9
by Gustavo Salaiz 25 Sep '03

25 Sep '03

Hi, have anybody installed the IXA WorkStation over RedHat 9 instead ReadHat 7.2?, i received the kit but i have troubles with the graphical configuration , i would like to know if it is posible. I'm working in a DEll Optiflex GX 270 with 2 Pentium 4 3.0 GHz Thanks _________________________________________________________ Do You Yahoo!? La mejor conexión a internet y 25MB extra a tu correo por $100 al mes. http://net.yahoo.com.mx

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How to read data from GPRs using absolute addressing?
by Jo Ueyama 24 Sep '03

24 Sep '03

Hi All, I am writing a program in C++ to read a data from a GPR register (via uEng_readRelGpr method), which was previously placed by a microcode program (using the absolute addressing mode). The sample code to place a value in a GPR is as follows: .areg @gpr1 0 immed[@gpr1, 0xFFFFFFFF] immed_w0[@gpr1, CAFE] done#: nop ctx_arb[voluntary] br[done#] However, I can't read the value (0xFFFFCAFE) via uEng_readRelGpr (using C++ program) after running the microcode above. The resulting value (0xFFFFCAFE) seems to be swapping across different registers over the ones belonging to the same relative address with different contexts (i.e. 0, 16, 32, ...). Essentially, I'd like to place a given value to one absolute GPR register using a microcode program and read the same value via C++ program thereafter. Any idea/clue will be highly appreciated.** With Thanks, -Jo'

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RE: [ixp1200] Accessing host RAM.
by Rashid A. Raj 15 Sep '03

15 Sep '03

Yes it is possible. You will have to configure the 21555 non-transparent PCI-PCI bridge. Regards, Rashid -----Original Message----- From: Venkata Avasarala [mailto:venkata@acad.umass.edu] Sent: Monday, September 15, 2003 9:15 PM To: ixp1200(a)CS.Princeton.EDU Subject: [ixp1200] Accessing host RAM. Hi, Is is possible to access the ram of the host from the IXP ? Is any additional configuration required to the PCI-PCI bridge ? Thanks, Venkata.

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Accessing host RAM.
by Venkata Avasarala 15 Sep '03

15 Sep '03

Hi, Is is possible to access the ram of the host from the IXP ? Is any additional configuration required to the PCI-PCI bridge ? Thanks, Venkata.

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Receiving packets to ethernet ports
by Mohammad Shorfuzzaman 10 Sep '03

10 Sep '03

Hi all, I am working with IXP1200 evaluation board (B0 version) and set up the working environment following the Intel "how-to" document. The IXPEB is connected to the rest of the system through cosole+ethernet cable. What I want to do is to receive some packets to one of the 8 ethernet ports of the IXPEB and count them. I tried the Intel IXA SDK ACE model but failed as I was unable to boot the IXP box with the kernel (linux-2.3.99-pre3) that is included in the IXA SDK. Could any one please give me some directions to proceed other than the way I tried. Thanks in advance. M. Shorfuzzaman ------------------------------------------------- This mail sent through IMP: http://horde.org/imp/

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Question on enp-2505
by Feng Tang 09 Sep '03

09 Sep '03

Hello, Currently, my problem when trying to boot linux is: After the board entered cygmon, I typed "go" command, then the minicom screen show below information: ****************** cygmon>go cygmon_handle_exception()monitor_loop return=0 Returned from breakpoint Waiting for host based download Press space bar to abort host download mode.... .. .. .. Press space bar to abort host download mode.... ******************** Then I open another terminal and entered the directory of /opt/ixasdk/enp-2505/bin. I run the script .create_environment.rc and boot_bv. The screen of boot_bv show: ********************* eht1: unknow interface: No such device rmmod: module pciDgNet is not loaded rmmod: module pciDg is not loaded Booting board before = 0x7e6c6700 ********************* Then the screen of minicom show below information: ******************** Booting linux.... Hit breakpointDisassembling 0xc4e9.8944 mrcge 13, 4, r9, cr3, cr14, {4} Waiting for host based download Press space bar to abort host download mode... Press space bar to abort host download mode... ..

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ENP2505 board as a Packet Generator
by Lim Boon Ping 05 Sep '03

05 Sep '03

Hi All, Did anyone have an idea on how to generate packet using enp-2505 board? Is it feasible to generate packet with ixp1200, or rather than using Linux OS itself (i have no idea on how to do it!)? This packet generator will be connected to another enp-2505 board, further classified into different traffic classes (UDP, TCP, ICMP etc.) and being forwarded or dropped based on their packet type. ===== Best regards, Lim Boon Ping --------------------------------------- Post-Graduate Student Multimedia University Cyberjaya, Malaysia HP: 012 3180321 "What about transforming a pencil into human brain in next 50 years?" __________________________________ Do you Yahoo!? Yahoo! SiteBuilder - Free, easy-to-use web site design software http://sitebuilder.yahoo.com

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Booting IXP1200 EB
by Mohammad Shorfuzzaman 01 Sep '03

01 Sep '03

Hi all, Did anyone succeed to boot IXP1200 EB using the linux-2.3.99-pre3 kernel included in the Intel IXA SDK CD? I installed the packages from the SDK 2.0.1 CD and tried to boot using zImage (kernel image), but it did not work for me. If anybody found it working, could you please share a copy of that kernel image (zImage) with me? Thanks in advance. -- M. Shorfuzzaman ------------------------------------------------- This mail sent through IMP: http://horde.org/imp/

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Problem rnning ixstart script
by Mohammad Shorfuzzaman 29 Aug '03

29 Aug '03

Hi all, I tried to run the sample packet count application from the IXA SDK. After successfully completing the steps related to compiling microcode source files and core components, I attempted to run the application on IXP EB with ./ixstart. It gives the following error: ixasl.o: unresolved symbol get_virtual_mem_map library aces require ixasl driver. ixasl driver does not appear to be running. ixconfig: Resource Manager intialization failed Sat Jan 3 02:31:40 1970 rmlib.c, line 80: open failed: errno 2 I tried to "insmod ixasl.o", but it gives the same error: ixasl.o: unresolved symbol get_virtual_mem_map Did any body successfully face this problem running this count application? Please help. Thanks. Mohammad Shorfuzzaman ------------------------------------------------- This mail sent through IMP: http://horde.org/imp/

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Gerry Murphy/Radisys_Corporation/US is out of the office.
by Gerry.Murphy＠radisys.com 21 Aug '03

21 Aug '03

I will be out of the office starting 08/15/2003 and will not return until 08/27/2003. I will respond to your message when I return. Please contact Brett Prochaska for any urgent issues

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RE: [ixp1200] Frustration with subroutines...
by Cyrus Hall 13 Aug '03

13 Aug '03

The first solution certainly works, and I used to use it when I only had a single call point, but now I have need for fairly separated call points for this given code, and need to get data both in to and out of the subroutine (a "return value" if you will). I'm low on code store, and the subroutine is rather large, so a macro is out of the question. I gave the second solution a shot, after adding a branch around the code so it wouldn't execute when included. IE: br[after_include#] #include "file.uc" after_include#: However, I continue to get the same errors. The compiler still considers the variable initialized in the macro as separate from those (with the same name) in the subroutine. IE, "WARNGING: GPR, 'ret_addr', was referenced, but never assigned to," from within subroutine. It would appear that the .local directive is being ignored, although the compiler does not complain. I went back and re-read section 2.2.7 of the Microcode Programmer's Reference Manual, and it would seem that your suggestion *should* actually be working. However, I would guess that uca implements macros by simple cut-past and substitute, so it's not considered to be part of the .local declaration. I also took a look at how the microC complier handles function calls, only to find that it too uses global registers. Needless to say, I don't have many unused registers left either, and I'm trying to avoid the losing one of them for the entire code space as hard as I can. Thanks, Cy On Wed, 2003-08-13 at 15:37, Johnson, Erik J wrote: > I wouldn't think you would have to make it global, but certainly you > would have to make the live range through the subroutine (which make > sense from the functionality you want to achieve). I am stuck in a > hotel right now and don't have access to the assembler, but I would > guess that the following would work > > .local rtn_addr > load_addr[rtn_addr, ret_loc#] > br[sub_func#] > ret_loc#: > //...other code... > > .subroutine > sub_func#: > //does neat stuff > rtn[rtn_addr] > .endsub > .endlocal > > Of course, there are drawbacks to this as well. The rtn_addr is live > for the "other code", but perhaps you can re-arrange the code to fix > this "problem" as follows: > > Some ".h" file > > .local rtn_addr > #macro my_sub_func[] > load_addr[rtn_addr, ret_loc#] > br[sub_func#] > ret_loc#: > > .subroutine > sub_func#: > //does neat stuff > rtn[rtn_addr] > .endsub > .endlocal > > > Some .uc file > #include "my.h" > > my_sub_func[] > // other code > > > Wow, now I really wish I had the assembler with me because I probably am > just fooling myself into thinking this works... > > erik > > ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ > Erik J. Johnson > Intel Research & Development > erik.j.johnson(a)intel.com > NOT SPEAKING FOR INTEL > ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ > > > -----Original Message----- > From: Cyrus Hall [mailto:hallcp@cs.colorado.edu] > Sent: Wednesday, August 13, 2003 2:07 PM > To: ixp1200 List > Subject: [ixp1200] Frustration with subroutines... > > > A general question in regards to "passing" registers to branch points. > Here is what I would love to be able to do: > > .local rtn_addr > load_addr[rtn_addr, ret_loc#] > br[sub_func#] > ret_loc#: > .endlocal > //...other code... > > .subroutine > sub_func#: > //does neat stuff > rtn[rtn_addr] > .endsub > > IE, I want to declare a variable->register mapping and then be able to > use that same register in a subroutine. I've tried fooling around with > the .subroutine structures assembly with no luck. Only if rtn_addr is > live for the entire program does that work. Is there anyway to control > live ranges when using subroutines, or will uca force one to waste a > register by making it global? > > Thanks, > Cy >

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Frustration with subroutines...
by Cyrus Hall 13 Aug '03

13 Aug '03

A general question in regards to "passing" registers to branch points. Here is what I would love to be able to do: .local rtn_addr load_addr[rtn_addr, ret_loc#] br[sub_func#] ret_loc#: .endlocal //...other code... .subroutine sub_func#: //does neat stuff rtn[rtn_addr] .endsub IE, I want to declare a variable->register mapping and then be able to use that same register in a subroutine. I've tried fooling around with the .subroutine structures assembly with no luck. Only if rtn_addr is live for the entire program does that work. Is there anyway to control live ranges when using subroutines, or will uca force one to waste a register by making it global? Thanks, Cy

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IXP CSR.
by Kameswara Avasarala 06 Aug '03

06 Aug '03

Hi, Has anybody tried to access the IXP CSR space from the host ? The pciDg driver supplied by Intel maps the IXP CSR region into the host memory to access the DOORBELL register. Is is possible to access any register(eg. the watchdog timer registers) through this mapping ? Thanks, Kamesh.

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[Q] Does Intel provide IXP1200EB device driver for linux host?
by Cho, joon-woo 06 Aug '03

06 Aug '03

Does Intel provide IXP1200EB device driver for Linux PC? I knew that Intel doesn't support device driver for Linux PC. But I see pciDg from this mailing-list. Is this a device driver which is provided by Intel? If yes, plz say me web or FTP address to get this device driver & driver manual. Thanks.

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IXP 1200 reset.
by Kameswara Avasarala 31 Jul '03

31 Jul '03

Hi, Is there anyway by which we can reset the IXP from the host ? Since the IXP CSR is accessible from the host I tried the following 1) Wrote 0xFFFFFFFF into the IXP1200_RESET register 2)Enabled Timer 4 (watchdog) and zeroed (atleast I thought I did) out the timer from the host. Writing into the IXP1200_RESET register does not work even from the SA itself whereas the watchdog works. Thanks, Kamesh.

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Where to start?
by Veluchamy Dinakaran 30 Jul '03

30 Jul '03

Hello all, I am planning to carry out my, Masters Degree, project on the Intel IXP1200. I have gone through the documentation that was provided in the Intel SDK CD. Is there any book that deals with this system(IXP1200) in depth and helps out in programming too? Where should I start from? Please guide me. Thank you, D.Veluchamy

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number of rings
by Najati Imam 28 Jul '03

28 Jul '03

How does one determine the number of rings available to the system, or how many have been allocated; also, is there a way to determine which are in use? I would suspect, considering this is mostly just the Simple Count App that only 0-3 should be in use. Najati

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Re: [ixp1200] number of rings
by Shyamal Pandya 27 Jul '03

27 Jul '03

The resource managerand ixconfig code are the place to look for how the rings are alllocated. I believe the maximum is 32 rings for each queue group. For the simple count application only two of the microengines are used, one fr egress and one for egress. I don't remember the ring assignments but the code and the comments in the resource manager should be of good help here. Of course there is one ring per port from which the egress microblock reads packets. -- Shyamal Pandya Arizona State University Addr: 920 S Terrace Rd #102 Tempe AZ 85281 Phone: 1-480-966-1982 >From: Najati Imam <najati(a)netlab.uky.edu> >Reply-To: ixp1200(a)CS.Princeton.EDU >To: ixp1200(a)CS.Princeton.EDU >Subject: [ixp1200] number of rings >Date: Sat, 26 Jul 2003 17:50:03 -0400 (EDT) > >How does one determine the number of rings available to the system, or how >many have been allocated; also, is there a way to determine which are in >use? I would suspect, considering this is mostly just the Simple Count App >that only 0-3 should be in use. > >Najati > _________________________________________________________________ Help STOP SPAM with the new MSN 8 and get 2 months FREE* http://join.msn.com/?page=features/junkmail

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Counting Sample
by Daniel Peek 25 Jul '03

25 Jul '03

Hello all, I am trying to run the packet counter from Johnson & Kunze chapter 5 on a Radisys enp-2505. I can download and run the code just fine from the IDE, but no packets ever seem to be received. I replaced the board.h file with one that includes the CONFIG_BRIDALVEIL option. Any idea what the problem could be? Thanks in advance, Daniel Peek

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Re: [ixp1200] Compiling armtoolchain
by rasit＠cs.umanitoba.ca 23 Jul '03

23 Jul '03

Hi David, Moh'd is my student, so I can reply in behalf of him. Actually, unless 3 disk RH9 distribution is missing some package, your suggestion is not valid, as we installed *everything* on the host system, i.e., all packages on all 3 discs. As for the command *before* the failure, the whole package is build by a single make, so we don't know unless we dissect the makefile. You comments are still appreciated. Thanks, Rasit According to David Mentre: > > Hello, > > > From: Mohammad Shorfuzzaman [mailto:szaman@cs.umanitoba.ca] > > > I've downloaded the necessary tar files in the download directory and > > performed instruction as said in the README file. The > > completiion of "make" ends > > with these errors: > > > > makeinfo: Removing output file > > `/root/ixp1200_linux/src/glibc-2.1.3/manual/libc.info' due to > > errors; use > > --force to preserve. > > make[3]: *** [libc.info] Error 2 > > make[3]: Leaving directory > > `/root/ixp1200_linux/src/glibc-2.1.3/manual' > > make[2]: *** [manual/subdir_install] Error 2 > > make[2]: Leaving directory `/root/ixp1200_linux/src/glibc-2.1.3' > > make[1]: *** [install] Error 2 > > make[1]: Leaving directory `/root/ixp1200_linux/build/glibc-2.1.3' > > make: *** [glibc] Error 2 > > Your are not giving us enough information. You should give us the error > messages from the command executed before make aborts the compilation. > > As a rule of thumb, always give the last command executed by make. > > Anyway, I would say that your compilation fails to produce documentation, > probably because you don't have a needed package (info probably). > > Best regards, > d. > -- > David Mentré <mentre(a)tcl.ite.mee.com> - Research engineer > Mitsubishi Electric ITE-TCL / European Telecommunication Research Laboratory > > Phone: +33 2 23 45 58 29 / Fax: +33 2 23 45 58 59 > http://www.mitsubishi-electric-itce.fr > -- M. Rasit Eskicioglu E-mail: rasit(a)cs.umanitoba.ca Department of Computer Science Phone : (204) 474-8835 (Office) 528 Machray Hall (204) 474-8313 (Messages) University of Manitoba Fax : (204) 474-7609 Winnipeg, Manitoba R3T 2N2 Canada URL : http://www.cs.umanitoba.ca/~rasit

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Problems starting the sample count ace
by Øyvind Hvamstad 23 Jul '03

23 Jul '03

Hi, I'll try sending this again. I'm totally stuck here, could anyone tell me what the causes this error when running the sample count application (tutorial1)? The same occurs when running the l3forward! (From the serial console) rmdrvr: Setting up 64 bit bidirectional mode ingressAce: memory violation at pc=0x02027ce8, lr=0x400a6af8 (bad address=0x000) (When running ixstart) ixconfig: Starting microace ifaceInput ifaceInput: IX-ACE Initialization Failed Wed Dec 31 20:01:32 1969 ingress_ace.cpp, line 161: init : Couldn't open device /dev/if0.

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RE: [ixp1200] excessive collisions on 10 Mbit/s ethernet with BridalVeil Card
by Botham, Mick 23 Jul '03

23 Jul '03

Colin, Beware bit 16.8 in the PHY register set. 10MB half-duplex gives (by default) a loopback at the PHY. Best to avoid this configuration, or talk to the PHY and change this bit setting. Rgds Mick -----Original Message----- From: Colin Flanagan [mailto:colin.flanagan@ul.ie] Sent: 23 July 2003 09:40 To: ixp1200(a)CS.Princeton.EDU Subject: [ixp1200] excessive collisions on 10 Mbit/s ethernet with BridalVeil Card Hello, I am working with the IXP1200 book by Johnson & Kunze, and am trying to get the "single thread receive" code from chapter 5 to work successfully on the BridalVeil board. To this end I have written my own drivers for the octal MAC and have modified ue.o to reflect the 64-bit bi-directional IX bus. I can get everything to work and have the IXP1200 receiving packets successfully from a Smartbits over a 10Mbit/s simplex Ethernet link. However, I get excessive collisions on the link, these can range from 0.14 collisions per packet sent to 1.2 collisions per packet sent. This seems like very unusual behaviour. I wonder if anyone else has seen anything like this? Interestingly, the rate of collisions on the link seems to be related quite sensitively to the program running on the ready bus sequencer. With 12 RxRdy MAC0 instructions running on the RBS, there are no collisions at all. With a single RxRdy MAC0 followed by 11 NOP1 instructions, the rate of collisions per packet sent is 0.14. With alternating RxRdy MAC0 / TxRdy MAC0 pairs (repeated 6 times), I get 1.2 collisions per packet transmitted from the Smartbits. With 11 RxRdy MAC0 instructions and a single TxRdy MAC0 instruction, the rate is 0.7 collisions per packet transmitted from the Smartbits. In all cases the RDYBUS_SYNCH_COUNT_DEFAULT register is set to 0. The IX bus is running at 66MHz. I find this quite confusing, surely there should be no need for any collisions on a link with only one source (the Smartbits)? One thought that has occurred to me, is the IXF440 applying backpressure to the link? I can't see how this would happen though, in my understanding only a Flwctl instruction can cause backpressure to be applied. Alternatively, is the repetition rate of the ready bus program significant? All the RBS programs I have tried take 36 cycles, at 66MHz this should allow an adequate rate of sampling of the status bits. If anyone else has encountered problems like this, or can give me pointers to where I might be going wrong, I'd be very grateful to receive them. Thanks, Colin Flanagan Dept of Electronic & Computer Engineering University of Limerick Ireland PS FBI setup I am using: RCV_RDY_CTL = 0 XMIT_RDY_CTL = 0 FLOWCTL_MASK = 0 RDYBUS_SYNCH_COUNT_DEFAULT = 0 RDYBUS_TEMPLATE_CTL = 0xf00

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IXP1200 Simulator - Developer Workbench version 2.0.83
by abhi＠cs.unc.edu 23 Jul '03

23 Jul '03

Hi, I have just started working on IXP1200 and I have been following the book IXP1200 Programming by Erik Johnson and Aaron R. Kunze (Intel Press). I have been using the simulator that came with this book, Developer Workbench version 2.0.83. I am having problems with it and I think there are some bugs in the simulator. I was wondering whether there is some other simulator that can be used and how that can be available. Or is this is the simulator everyone uses, in that case I may need to reinstall it(I have done that once). Any help would be greatly appreciated. Thanks Abhishek Department of Computer Science, UNC, Chapel Hill.

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[Q] I have a question about IXP SDRAM mapped into PCI bus.
by Cho, joon-woo 23 Jul '03

23 Jul '03

Hello. I kwow that all region of IXP SDRAM is mapped into PCI bus. And I am curious about how do I read/write 'SDRAM mapped in PCI bus' using vera source. Is there a function to access that region? I think that 'VeraI2Oexp' function is used for reading/writing to SDRAM Am I right? If right, please give me more information. And can I access that address using 'variable' like below? example) int xx (allocated in SDRAM) write some data to xx Please answer my questions. Thanks

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Inter-ME uCode communication
by Cyrus Hall 22 Jul '03

22 Jul '03

I've finally gotten to the point in my code where I need to expand to multiple microengines. I think I've figured out what changes are needed in ixconfig, but other things are now vexing me. In the count example, the dispatch loop either forwards a packet with DL_SASink[] or DL_MESink[]. From the documentation, it sounds like DL_MESink[] passes the current packet reference to the next control block (next microengine). Just like DL_SASink[] has a inverse (DL_SASource[]), I would expect the the ME version to have one, something like DL_MESource[], yet no such macro exists. So what do must of you do? Have you just written a DL_MESource, or do you use one of the many other ways to syncronize between engines (SRAM CAM locks, or some other test-set mechanism)? I'm wondering which is the best way to go from here. Thanks, Cy

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