- ixp1200 - lists.cs.princeton.edu

Problems with mod operation
by Chac 09 Nov '04

09 Nov '04

Hi: I�m implementing an RSA encription in the IXP1200 and I need to do a Modulus after division operation. I can�t find how to do this, in fact I can�t do any division because I can�t declare a variable of type fixed or float. I also have some problems to set a watch in variables when debbuging, I can�t see the values en some variables only shows an error : ERROR: invalid array range (array size = 524288) Thanks in advance, regards. Carlos. __________________________________ Do you Yahoo!? Check out the new Yahoo! Front Page. www.yahoo.com

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Re: [ixp1200] chapter 8 ethernet header problem
by nitin makhija 08 Nov '04

08 Nov '04

Hellow, i'm not even able to debug the chapter 8 example, its giving error regarding hash unit.......so can anyone send me the files for example code of chapter 8....debug results are as follows:::: ........................................................ D:\Study\Project_IXP\test_nitin\Chapter08\bridging-latency.c(158): error : intrinsic data buffer "hashInput_103$1$0" cannot be read : : bridging-latency.c : buffer.c : receive.c : Reading debug file D:\Study\Project_IXP\test_nitin\Chapter08\bridging-latency.dbg : Reading debug file D:\Study\Project_IXP\test_nitin\Chapter08\buffer.dbg : Reading debug file D:\Study\Project_IXP\test_nitin\Chapter08\receive.dbg Compiling for receive-bridge-enqueue-me1.list... : Intel(r) Microengine C Compiler, Version 2.01 (2002/01/14 15:08:38) : Copyright (C) 1985-2001 Intel Corporation. All rights reserved. : : IPO: using IR in D:\Study\Project_IXP\test_nitin\Chapter08\bridging-latency.obj : IPO: using IR in D:\Study\Project_IXP\test_nitin\Chapter08\buffer.obj : IPO: using IR in D:\Study\Project_IXP\test_nitin\Chapter08\receive.obj : IPO: performing multi-file optimizations D:\Study\Project_IXP\test_nitin\Chapter08\bridging-latency.c(158): error : intrinsic data buffer "hashInput_103$1$0" cannot be read : : bridging-latency.c : buffer.c : receive.c : Reading debug file D:\Study\Project_IXP\test_nitin\Chapter08\bridging-latency.dbg : Reading debug file D:\Study\Project_IXP\test_nitin\Chapter08\buffer.dbg : Reading debug file D:\Study\Project_IXP\test_nitin\Chapter08\receive.dbg Build results: (2) errors, (0) warnings [press F4 to select errors/warnings] ......................................................................................................................................... and when i tried this code while removing hash unit functions......then i'm getting a buffer overflow error....... do reply soon if anyone knows????? Thaxs in advance.. Regards, Nitin On Sat, 06 Nov 2004 Shweta Rao wrote : >Hi, >I was running the chapter 8 example on develper's workbench in simulation mode. >The packet with ethernet addresses 'cafebabe' and 'deadbeef' arrives >in sdram correctly but when the structure headerData in datawatch >shows the first word of the quadword '0000cafe' repeated over and over >again . it does not show the correct ethernet addresses.Can anyone >tell me what is the problem? > >thanks, >shweta >_______________________________________________ >ixp1200 mailing list >ixp1200(a)lists.cs.princeton.edu >https://lists.cs.princeton.edu/mailman/listinfo/ixp1200

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Setting the data Watch.....
by nitin makhija 08 Nov '04

08 Nov '04

Hi, i'm not able to set data watch for variabes whose adress has not been explicitly defined.....is it so or is there any setting in the SDK...actually i'm tring to search in a data structure....and want to have a track of the index where the current search is going on...so need to have a data watch at that index variable....WHICH IS NOT EXPLICITLY BIND TO A PARTICULAR MEMORY LOCATION........ Thanxs in advance .... regards, Nitin

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chapter 8 ethernet header problem
by Shweta Rao 05 Nov '04

05 Nov '04

Hi, I was running the chapter 8 example on develper's workbench in simulation mode. The packet with ethernet addresses 'cafebabe' and 'deadbeef' arrives in sdram correctly but when the structure headerData in datawatch shows the first word of the quadword '0000cafe' repeated over and over again . it does not show the correct ethernet addresses.Can anyone tell me what is the problem? thanks, shweta

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Initialisation...
by nitin makhija 05 Nov '04

05 Nov '04

Hellow, Can anyone help me out with the strongARM programming, i wanna know abt. how can we program StrongARM to initialise the data-structures, which wd. be required in every applications....and how can strongARM interact wd. the MEs..... can anyone suggets any .doc or link or example code.... Regards, Nitin Makhija

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(no subject)
by nitin makhija 03 Nov '04

03 Nov '04

Hi, can anyone tell me how can i restrict the sdk complier to restrict allocating variables from memory,being it any sram or sdram, certain locations or bunch of locations... i mean i need to have a basic data structure (which is a table) which store some rules...this will be iniatised at first...but need to be changed dynamically if one wants 2 add a new rule.....i want that other variables will not overwrite the content of table... so i want to restrict variables, for which i don't want to specify memory location explicitly, out of certain memory location where i have stored my rules..... i guess there is some compler settings........?????.... thanxs in advance.... regards, Nitin Makhija M.Tech(CS) IIT-Kharagpur

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compiler optimizations--instruction address problem
by Shweta Rao 01 Nov '04

01 Nov '04

Hi, When i run my code in simulation debug mode on the workbench ,i have set it to display the instruction addresses and in the project settings i have set compiler options for optimization to none. Inspite of that there are two instruction where the instruction addresses does not show up and the simulator does not execute them.Is it because of the code or the project settings. The instructions are buf_handle = receive_packet(0, 5, &cur_pkt_len); //buf_data_ptr = (__declspec(sdram) long long *)(buffer_get_data_ptr(buf_handle)); buf_data_ptr = (__declspec(sdram) void *) (((unsigned int)buffer_get_data_ptr(buf_handle)) + 3); If anyone is aware of the solution,please let me know. Thanks, shweta

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pipeline in MEs
by nitin makhija 30 Oct '04

30 Oct '04

Hi,... could anyone tell me the exact stages og pipeline in the micro-Engines...i mean what are the difefrent stages and depth of the pipeline??? i have got examples where different threads can receive mpkt's frm different ports....but can any one suggets any way to receive mpkt's frm same ports by different threads...these threads may be on different ME's....i wanan know wht. kind of mutual exclusion shd. be done explicitly while allocating the sram and sdram buffers..... thanxs in advance... Regards, Nitin Makhija M.Tech(CS) IIT-Kharagpur

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Running code from workbench
by Shweta Rao 28 Oct '04

28 Oct '04

Hi, I am new to IXP1200. I just have one windowsNT machine on which i have installed the workbench and the SDK.I connect to the EB thru the hyperterminal. I used cygmon to boot linux(using the monta vista patch) and i get the shell prompt on the hyperterminal.The EB box and the NT machine are connected on a local LAN with a hub. i use the ifup script on hyperterminal and also set the ip address of my NT machine in /etc/hosts. Both machines can ping each other. What do i start next on the hyperterminal to get something working.If i connect from the workbench while testing a sample program using the hardware option ,it throws an error saying it cannot connect ? Also, i tried using the ACES tutorial for the Count application,it gives me this error ixasl.o: unresolved symbol get_virtual_mem_map > library aces require ixasl driver. > ixasl driver does not appear to be running. > ixconfig: Resource Manager intialization failed > Wed Dec 31 20:01:40 1969 > rmlib.c, line 80: open failed: errno 2 i tried insmod ixasl but that also gives the same error. I have 8 10/100 ports and 2 giga ports. i'll be using the 10/100 ports only. How do i check whether the drivers are loaded or working for these ports ? How to get all these things working? Please help asap!! Thanx, Shweta

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Re: problems with octmac.o
by Ricardo Camarena Ramos 22 Oct '04

22 Oct '04

Hi Shweta. I had several problems when trying to "see" the ports. I don't remember I had that problem with octmac.o but I had with pciDg.o on the Linux host. What I did was to recompile the module as follows: cd /usr/src/linux edit Makefile and change the EXTRAVERSION=xxxx Where xxxx is the kernel version you are booting up in the Linux host. For example, if your kernel is 2.4.17-3smp put EXTRAVERSION=-3smp make mrproper make oldconfig make dep cd /mnt/cdrom/ENP-2505_Driver rpm -recompile boot_drv-2.0-1.src.rpm cd /opt/ixasdk/enp-2505/bin insmod pciDg.o After that I got a warning: tainted kernel. However the module loads OK. By the way, if you have a BV you must have patched the installation to work correctly with the MACs (this includes the octmac.o module). I prepared a log when I did it. Please look at "Corrections specific for Brivadeli card as specified by Joel Schuetze from Intel" section on http://webdiee.cem.itesm.mx/web2/comunicaciones/proyectos/LNX 2004-09 Installation log for Brivadeli card IXP1200 V3.txt You can find the files specified on it in: "Anexo a guia V2.doc" which is located in the same page. Hope it helps. ixp1200-request(a)lists.cs.princeton.edu wrote: >Send ixp1200 mailing list submissions to > ixp1200(a)lists.cs.princeton.edu > >To subscribe or unsubscribe via the World Wide Web, visit > https://lists.cs.princeton.edu/mailman/listinfo/ixp1200 >or, via email, send a message with subject or body 'help' to > ixp1200-request(a)lists.cs.princeton.edu > >You can reach the person managing the list at > ixp1200-owner(a)lists.cs.princeton.edu > >When replying, please edit your Subject line so it is more specific >than "Re: Contents of ixp1200 digest..." > > >------------------------------------------------------------------------ > >Today's Topics: > > 1. problems with octmac.o (Shweta Rao) > > > > ------------------------------------------------------------------------ > > Subject: > [ixp1200] problems with octmac.o > From: > Shweta Rao <shwetar(a)gmail.com> > Date: > Thu, 21 Oct 2004 15:18:03 -0700 > To: > ixp1200(a)lists.cs.princeton.edu > > >Hi, > >I tried to insmod octmac.o to set the mac addresses > >insmod octmac.o mac0="00:00:ca:fe:ba:be" and so on > >i go this error >unresolved symbol get_board_config >Please help. >shweta > > > >------------------------------------------------------------------------ > >_______________________________________________ >ixp1200 mailing list >ixp1200(a)lists.cs.princeton.edu >https://lists.cs.princeton.edu/mailman/listinfo/ixp1200 > > -- Ing. Ricardo Camarena Ramos camarena(a)itesm.mx Asistente de Investigación Departamento de Ingeniería Eléctrica y Electrónica Tecnológico de Monterrey, Campus Estado de México Teléfono: (5255) 5864.5555 extensión: 3016. enlace-intercampus: 80.236.3016 http://www.itesm.mx http://webdiee.cem.itesm.mx/web2 El contenido de este mensaje de datos no se considera oferta, propuesta o acuerdo, sino hasta que sea confirmado en documento por escrito que contenga la firma autógrafa del apoderado legal del ITESM. El contenido de este mensaje de datos es confidencial y se entiende dirigido y para uso exclusivo del destinatario, por lo que no podrá distribuirse y/o difundirse por ningún medio sin la previa autorización del emisor original. Si usted no es el destinatario, se le prohíbe su utilización total o parcial para cualquier fin.

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problems with octmac.o
by Shweta Rao 21 Oct '04

21 Oct '04

Hi, I tried to insmod octmac.o to set the mac addresses insmod octmac.o mac0="00:00:ca:fe:ba:be" and so on i go this error unresolved symbol get_board_config Please help. shweta

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where is the initilization of the buffer descriptors (SRAM Push) ?
by KIM, IK KYUN 06 Oct '04

06 Oct '04

I am studying the buffer management of IXP 1200. But I can not find the location of initialization of buffer descriptors (SRAM Buffer descriptor). Obviously I confirmed that : when packet is arriving at Ingress micro ace, Ingress Micro ACE gets the buffer descriptor for SDRAM from SRAM using the instruction "sram[pop,....]". I am not sure, buffer descriptor initilazation is executed "on Micro block" OR "on ARM core". I would like to know the exact initialization code (uc or cpp). Thanks.

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Memory settings??..IXP1200
by nitin makhija 06 Oct '04

06 Oct '04

Hellow, Just wanna know tht all memory management has to be done by the programmer even while programming in MicroEngineC or tht wd. be taken care by complier.. actually i have to store a hash table kinda data-structure for storing firewall rules, and LIFO we use for mapping between SRAM and SDRAM (locations where the mpkt's will be stored after receiving), Queue which i have to maintain for passing pkt's b./w receiving and transmitting micro-Engine........and other variables ....so shd. i have to specify the address for these...and shd. i ahve to take care tht these migth not be overwritten by each other, or the complier has some option which can take care of this.... and if someone knows abt. complir settings do tell me tht....there is an option as "reserve memory option for variables"..is this is the one for restricting???? confused.... if someone knows something abt. this do reply.. Thanxs.. Regards, Nitin Makhija M.Tech(CS) IIT-kharagpur

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Bypassing ixstart
by Wim Van de Meerssche 09 Sep '04

09 Sep '04

Hi all, I've been trying to get my application to work without ixstart (it's not flexible enough for me). I've not yet been successful in using the Intel ingress and egress aces without ixstart. Has anyone been able to do that? Another solution to the problem would be using other code that can recieve/send packages, is there free code somewhere that I can use? thanks, Wim

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receiving frm same port
by nitin makhija 07 Sep '04

07 Sep '04

hellow, Can anyone tell me tht involving more than one microengine ( 5-8 threads ) to receive pkt's from the same mac port is correct .... i mean can we have more than 1 ME receiving pkt's frm same port and if we can do this then whether the RFIFO used wd. be different or same for these ME ( or for all these Threads).....and if the Rfifo is same then do i need to do sometime to have roper synchronisation or it wd. be automatically done..... basically i want to receive pkt. frm a single port but wanna involve more than 1 ME..... Do reply, if anyone know abt. this.... Take care Luv Nitin

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Ethernet ARP
by Chong Lee 30 Aug '04

30 Aug '04

Hi everyone, Currently I am trying to implement Ethernet ARP module using IXP1200 in my project. Besides implementing ARP module, my project will focus on detect and prevention of ARP cache poisoning. My idea of implementing detect and prevention for ARP poisoning is by setting up a checker for both downward and upward of ARP request. hope to get some advices and ideas from this forum... btw, just wanna know, which reference design in workbench developer would be best suit this project?.. thanks.. Thanks. ===== Best wishes, Kuay, Chong Lee __________________________________ Do you Yahoo!? Yahoo! Mail - 50x more storage than other providers! http://promotions.yahoo.com/new_mail

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Ethernet ARP
by Chong Lee 30 Aug '04

30 Aug '04

Hi everyone, Currently I am trying to implement Ethernet ARP module using IXP1200 in my project. Besides implementing ARP module, my project will focus on detect and prevention of ARP cache poisoning. My idea of implementing detect and prevention for ARP poisoning is by setting up a checker for both downward and upward of ARP request. hope to get some advices and ideas from this forum... btw, just wanna know, which reference design in workbench developer would be best suit this project?.. thanks.. Thanks. ===== Best wishes, Kuay, Chong Lee _______________________________ Do you Yahoo!? Win 1 of 4,000 free domain names from Yahoo! Enter now. http://promotions.yahoo.com/goldrush

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ixp1200 and 2.4 kernel
by Gunnar Kristjánsson 18 Aug '04

18 Aug '04

Hi I am working with a ixp1200 RevC (I think) and have been use the 2.3.99 kernel from netwinder, I have tested 2.4.18 from mvista it boots fine, what I wanna know is it possible run Intel Untils mainly the workbench. Gunnar Kristjánsson gunnark01(a)ru.is Reykjavik University - Iceland

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file operations in .ind scripts?
by Arvind Giridhar Saraf 17 Aug '04

17 Aug '04

Hello, I am using IXP1200 simulator, and want to run an existing IXP1200 application with my routing table inputs. Currently, the applications routing table is set in .ind scripts using route_add function. The routing table I want to use instead is in a text file, and I will like a .ind script that reads the file and sets the application's route table accordingly. I don't see any clear support for that in the .ind scripts. Can anyone suggest how to do this? Thanks, Arvind

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Using the Ethernet ports of BV card
by Ing. Ricardo Camarena Ramos 13 Aug '04

13 Aug '04

Hi, I am trying to simulate in hardware the practice number 5. I have a BV card. The results I got when simulating in Workbench are correct, however when simulating with the card I never got any packages to count. I must say that I have simulated in hardware practice 3 (writing an array to memory and reverse it) and everything worked fine, I even used a tool from Georgia Tech to look at the memory of the board to double check the results. So here is what I have investigated until now, the value of rcv_rdy_lo when simulating only with Workbench is x1, x2, x4 and x8 when feeding packets in ports 1,2,3 and 4. Up to here is correct. When I change to hardware and after loading ue.o , running rs_udebug and assigning MACs through octmac.o the rcv_rdy_lo behaves incorrectly. It gives x200, x400, or x800 for packets arriving at ports 2, 3 and 4 (and nothing when feeding in port 1). I got a document indicating this problem has to do with an different distribution of MACs in the IX-Bus and instructed to me to apply these corrections: Replace the config_1200.cpp located in /opt/ixasdk/src/microace/common/wbench/SA1_CoreLibs/app_1200/ Replace board.h a located in /opt/ixasdk/enp-2505/src/linuxIXAedu/include/asm-arm/arch-ixp1200 Recompile kernel and octmac module cd /opt/ixasdk/enp-2505/src/linuxIXAedu make oldconfig make dep make zImage cd /opt/ixasdk/src/microace/aces/interface_ace/source/driver/octdrv/ make make install I verify zImage and octmac.o were updated, but I got the same results. It seems the corrections are not working. The last test I did was to modify the practice five writing the counters to SRAM instead to scratch, so I can inspect the memory with the Georgia Tech tools, but I got the same results. No packets are count. Any help or tip to solve this problem is very appreciated. Ricardo Camarena Ramos Asistente de Investigación Departamento de Ingeniería Eléctrica y Electrónica División de Profesional y Graduados, Campus Estado de México Premio Nacional de Calidad 1998 Teléfono: (5255)5864.5555 x 3208, 5864.5660 camarena(a)itesm.mx enlace-intercampus: 80.236.3208, www.cem.itesm.mx Tecnológico de Monterrey, 60 AÑOS COMPROMETIDOS CON LA EXCELENCIA EDUCATIVA Hoy mejor que ayer, y mañana mejor que hoy.

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NePSim: A Network Processor Simulator with Power Evaluation Framework
by Yan Luo 11 Aug '04

11 Aug '04

Hello All, We are pleased to announce the release of NePSim 1.0, the first open source integrated infrastructure for analyzing and optimizing Network Processor design and power dissipation at architecture-level. NePSim contains a cycle-accurate simulator for a typical NP architecture (Intel's IXP1200), an automatic verification framework for testing and validation, and a power estimation model for measuring the power consumption of the simulated NP. Four typical benchmark applications (ipfwdr, nat, url, md4) are included in the package. A paper on NePSim is going to appear in the coming IEEE Micro Special Issue on Network Processors for Future High-End Systems and Applications, Sept/Oct 2004. You are welcome to download NePSim from http://www.cs.ucr.edu/~yluo/nepsim/ We have set up a mailing list at https://www.cs.ucr.edu/mailman/listinfo/nepsim You can use the above mailing list, NOT this ixp1200 mailing list, to ask questions, report bugs and get more information. Thanks. Best Regards, Yan Luo -- yluo(a)cs.ucr.edu Computer Science Dept., Univ. of California Riverside, CA 92521, USA http://www.cs.ucr.edu/~yluo

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Using the Ethernet ports of BV card
by Ing. Ricardo Camarena Ramos 09 Aug '04

09 Aug '04

Hi, I?m trying to simulate in hardware the practice number 5. I have a BV card. The results I got when simulating in Workbench are correct, however when simulating with the card I never got any packages to count. I must say that I have simulated in hardware practice 3 (writing an array to memory and reverse it) and everything worked fine, I even used a tool from Gergia Tech to look at the memory of the board to double check the results. So here is what I have investigated until now, the value of rcv_rdy_lo when simulating only with Workbench is x1, x2, x4 and x8 when feeding packets in ports 1,2,3 and 4. Up to here is correct. When I change to hardware and after loading ue.o , running rs_udebug and assigning MACs through octmac.o the rcv_rdy_lo behaves incorrectly. It gives x200, x400, or x800 for packets arriving at ports 2, 3 and 4 (and nothing when feeding in port 1). I got a document indicating this problem has to do with an different distribution of MACs in the IX-Bus and instructed to me to apply these corrections: Replace the config_1200.cpp located in /opt/ixasdk/src/microace/common/wbench/SA1_CoreLibs/app_1200/ Replace board.h a located in /opt/ixasdk/enp-2505/src/linuxIXAedu/include/asm-arm/arch-ixp1200 Recompile kernel and octmac module cd /opt/ixasdk/enp-2505/src/linuxIXAedu make oldconfig make dep make zImage cd /opt/ixasdk/src/microace/aces/interface_ace/source/driver/octdrv/ make make install I verify zImage and octmac.o were updated, but I got the same results. It seems the corrections are not working. The last test I did was to modify the practice five writing the counters to SRAM instead to scratch, so I can inspect the memory with the Georgia Tech tools, but I got the same results. No packets are count. Any help or tip to solve this problem is very appreciated. Ricardo Camarena Ramos Asistente de Investigación Departamento de Ingeniería Eléctrica y Electrónica División de Profesional y Graduados, Campus Estado de México Premio Nacional de Calidad 1998 Teléfono: (5255)5864.5555 x 3208, 5864.5660 camarena(a)itesm.mx enlace-intercampus: 80.236.3208, www.cem.itesm.mx Tecnológico de Monterrey, 60 AÑOS COMPROMETIDOS CON LA EXCELENCIA EDUCATIVA Hoy mejor que ayer, y mañana mejor que hoy.

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Hellow..
by nitin makhija 01 Aug '04

01 Aug '04

Hellow, i'm just tring to understand how can i get information out of header of mpkt...so made few changes in eg. code of chapter 5 (which counts the mpkt's)...but not able to understand where m i going wrong...actually i'm not getting expected results.. changes which i made...... 1... added a new structure in buffer.h file typedef struct { unsigned int e_dst_hi32; unsigned int e_dst_lo16 : 16, e_src_hi16 : 16; unsigned int e_src_lo32; } ethernetHeader_t; 2... declared a pointer to this new type and it points to the buffer_handle (adress returned by a function where mpkt. is stored by RFIFO) 3... just checking whether lower 16 bits of dest mac is 0xffff or not...in a if-else block ,,,,,inside while function of main() 4....i have edited the stream, from ix simulator to have mac address as 0xffffffffffff the if block which i added in the main in receive.c file ... if( headerData.e_dst_lo16 == 0xFFFF ) scratch_incr(cntr, no_signal); else scratch_incr(cntr_blocked, no_signal); in this case cntr_blocked is incremented instead of cntr , which is expected. can u expain where m i going wrong... regards, Nitin Makhija

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how to extract the src & dest address....
by nitin makhija 31 Jul '04

31 Jul '04

hellow, Anyone cud. pls tell em how can i extract Dest. and src Ip and Port from a received pkt.. i'm trying to find out this frm eg. code of chapter 8 (Bridging eg. using hashing) in tht they have not even recived the mpackets frm RFIFO, neither the header have being read frm the sdram??? so how can they simply compare the dest. and src. Mac address for bridging..... i've also tried to understand the layer 3 forw. eg: but not sucedde in tht too... according to me following steps shd. be taken to compare any info frm the mpacket... 1. receive mpkt. from RFIFO into SDRAM. 2. then do sdram_read appropriate longwords, at the offset u require to read from say a 28 byte offset to read src. ip adress... 3. then perform the appropriate masking to get the required data .. I'm tring to include a code just to extract the header info, in the code of chapter 3( simple count eg. to have a feel of it) but even not suceeded in it. i was tring out this.... where buf_handle is the starting adress where the mpkt is stored in the sdram, and iphead is the pointer to a structure which has 2 unsigned integer as members..(just to take out a 64 bit value at a particular offset from start address)......just to being wd.... sdram_read(__declspec(sdram_read_reg) *iphead,volatile __declspec(sdram) * (buf_handle + 2) ,1,queue_default,ctx_swap); but this code is also giving an error.... \Study\Project_IXP\test_nitin\Chapter05\receive.c(206): error : expected an expression Sorry if i'm sounding stupid.....not able to find a proper documentation anywhere...if any of u has a sloution to this pls.. reply . By teh way vijay ive already subscribed to pricenton uni. mailing list...Thaxs for tht too .. regards, Nitin Makhija

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RE: [ixp1200] how to extract the src & dest address....
by Johnson, Erik J 30 Jul '04

30 Jul '04

Hi Nitin Yes, that is a known problem. You can find the answer (as well as other errata!) at the following URL: http://intel.com/intelpress/ixp1200/errata.htm Specifically, look for the ZIP file link about half way down the page. Let me know if you still have problems. erik ~~~~~~~~~~~~~~~~~~~~~~~~ Erik J. Johnson erik.j.johnson(a)intel.com Not speaking for Intel ~~~~~~~~~~~~~~~~~~~~~~~~ -----Original Message----- From: ixp1200-bounces(a)lists.cs.princeton.edu [mailto:ixp1200-bounces@lists.cs.princeton.edu] On Behalf Of nitin makhija Sent: Friday, July 30, 2004 1:03 PM To: ixp1200(a)lists.cs.princeton.edu Subject: [ixp1200] how to extract the src & dest address.... Hellow, i'm trying to run the example program of chapter-8 of book by Eric Johnson, but getting the following error's during compilation: Compiling for bridging-latency.list... C:\IXP1200_Programming CD\Chapter08\bridging-latency.c(51): error : intrinsic data buffer "hashInputSrc_93$1$1" cannot be read C:\IXP1200_Programming CD\Chapter08\bridging-latency.c(66): error : intrinsic data buffer "hashInputDst_93$1$1" cannot be read i have even checked "ixp.h" file and there too first parameter to teh hash func. is the input value.... and also cd anyone tell me how can i extract the destination & source ip adress frm the received pkt's....i have the starting adress of sdram where tht pkt. is stored??? i was tring out this.... where buf_handle is the starting adress iphead is the pointer to a structure which has 2 unsigned integer as members.. sdram_read(__declspec(sdram_read_reg) *iphead,volatile __declspec(sdram) * (buf_handle + 2) ,1,queue_default,ctx_swap); but this code is also giving an error.... \Study\Project_IXP\test_nitin\Chapter05\receive.c(206): error : expected an expression actually i want to extract src & dest. IP address alongwd. the port numbers.....and not able to do tht......if anyone of u know ...do help me out Regards, Nitin Makhija _______________________________________________ ixp1200 mailing list ixp1200(a)lists.cs.princeton.edu https://lists.cs.princeton.edu/mailman/listinfo/ixp1200

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