- ixp1200 - lists.cs.princeton.edu

How to Ensure Microcode Executes in the Correct Order?
by Jo Ueyama 24 Feb '04

24 Feb '04

Hi All, I am trying to run a Microcode program (code below) that reads one value stored in a *specific* address of the scratch memory and adds this value to anohter one (e.g. 0x1100AB88), storing its result on the same address of the same scratchpad. In 90% of the executions it runs alright, HOWEVER in 10% of the cases it jumps straightly to the write scratch instruction (without performing the alu operation). My question is: What instruction/switch do I need to add in order to ensure that instructions in microcode are carried in the correct order? In the code below the alu instruction MUST be performed *after* scratch read finishes AND *before* write scratch is carried out. Any ideas? Many thanks? -Jo' #include "stdmac.uc" .local zero gpr1 $xfer immed32[gpr1, 0x1100AB88] immed32[zero, 0x0] scratch[read, $xfer, zero, 0, 1], ctx_swap, defer[1] alu[$xfer, $xfer, +, gpr1] scratch[write, $xfer, zero, 0, 1], ctx_swap .endlocal

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RE: [ixp1200] How to Ensure Microcode Executes in the Correct Ord er?
by David Mentre 18 Feb '04

18 Feb '04

Hello Jo, > From: Jo Ueyama [mailto:ueyama@comp.lancs.ac.uk] > Sent: Tuesday, February 17, 2004 7:05 PM > Even though I am using ixp1200 (as quoted by Jimm), I'd > like to try > the signal on my code. > BTW, did you mean Microcode Programmer's Reference Manual > by quoting > "Intel Programmers Reference"? Yes, but I did nto take care and I was refering to IXP2400 version of this manual. > I was trying to locate the > .sig directive > but I couldnt find it. Would you mind ensuring the right > manual so that > I could find out the proper syntax for .sig directive? I think .sig is specific to IXP2xxx. It is one of the architecture redesign between ixp12xx and ixp2xxx. On ixp1200, you have only one signal per functionnal unit. So you need to wait on those specific signals, separetly. Sorry to have given wrong information. Looking back at you original code, the really annoying point, as underlined by Jim, is that your are doing an ALU operation on the register *before* being sure the source register is correclty loaded, due to the defer token (alu operation is executed *before* the context swap that should wait for scratch transfer completion occurs). The ctx_swap operation gives CPU to other threads and returns only after operation completion. So you really need to suppress this defer token to have a working code. Hope I'm not saying stupid things this time, Yours, d. -- David Mentré <mentre(a)tcl.ite.mee.com> - Research engineer (Ph.D.) Mitsubishi Electric ITE-TCL / European Telecommunication Research Lab Phone: +33 2 23 45 58 29 / Fax: +33 2 23 45 58 59 http://www.mitsubishi-electric-itce.fr

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please, Answer me!!!
by paragon 18 Feb '04

18 Feb '04

Hello, all !!! Where is sram or dram base address in enp-2611? Now. I was tested to following. #define BUF_SRAM_BASE 0x80000000 #define BUF_SDRAM_BASE 0x00000000 Is it problem? Please, answer me~~~ Thanks in advance.

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[ixp2400] Trasmit control word in TX?
by paragon 17 Feb '04

17 Feb '04

Hello~ I don't understand to following. ---------------------------- Writing the Transmit control word. MSF_TBUF_CONTROL_BASE is associated with TBUF element. I thought MSF_TBUF_CONTROL_BASE + tbuf_element, But MSF_TBUF_CONTROL_BASE + (tbuf_element <<3) in IXP2400/2800 Programming chapter 5 Um... What is reason about tbuf_elemnt <<3? Please, advice me~ ref. MSF_TBUF_CONTROL_BASE = 0x1800 Thanks.

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RE: [ixp1200] How to Ensure Microcode Executes in the Correct Ord er?
by Elsenbeck, Jim 17 Feb '04

17 Feb '04

Since his question may have been an ixp1200 (and not ixp2xxx) he really just wants to remove the defer[1]. jim -----Original Message----- From: David Mentre [mailto:Mentre@tcl.ite.mee.com] Sent: Tuesday, February 17, 2004 11:27 AM To: 'IXP1200 Developer's List' Subject: RE: [ixp1200] How to Ensure Microcode Executes in the Correct Ord er? Hello Jo, > From: Jo Ueyama [mailto:ueyama@comp.lancs.ac.uk] > Sent: Tuesday, February 17, 2004 5:06 PM > What instruction/switch do I need to add in order to ensure that > instructions in microcode are carried in the correct order? > In the code > below the alu instruction MUST be performed *after* scratch read > finishes AND *before* write scratch is carried out. > Any ideas? You must use a signal to wait for the read to be done. More specifically: > #include "stdmac.uc" > > .local zero gpr1 $xfer .sig sig_scratch > > immed32[gpr1, 0x1100AB88] > immed32[zero, 0x0] > > scratch[read, $xfer, zero, 0, 1], ctx_swap, defer[1] ;; replace above line with: scratch[read, $xfer, zero, 0, 1], sig_done[sig_scratch] ctx_arb[sig_scratch] ;; after that point, you'll be sure that read is done > alu[$xfer, $xfer, +, gpr1] > scratch[write, $xfer, zero, 0, 1], ctx_swap > .endlocal I've not compiled that code, so I may I made a typo or forgotten something. Signals are used at length in Intel microcode. You should absolutely read Intel manuals if you want to do serious IXP programming. Look at Intel Programmers Reference, sect. 2.8, registers & signals. Yours, david -- David Mentré <mentre(a)tcl.ite.mee.com> - Research engineer (Ph.D.) Mitsubishi Electric ITE-TCL / European Telecommunication Research Lab Phone: +33 2 23 45 58 29 / Fax: +33 2 23 45 58 59 http://www.mitsubishi-electric-itce.fr _______________________________________________ ixp1200 mailing list ixp1200(a)lists.cs.princeton.edu https://lists.cs.princeton.edu/mailman/listinfo/ixp1200 - - - - - - - Appended by Scientific-Atlanta, Inc. - - - - - - - This e-mail and any attachments may contain information which is confidential, proprietary, privileged or otherwise protected by law. The information is solely intended for the named addressee (or a person responsible for delivering it to the addressee). If you are not the intended recipient of this message, you are not authorized to read, print, retain, copy or disseminate this message or any part of it. If you have received this e-mail in error, please notify the sender immediately by return e-mail and delete it from your computer.

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RE: [ixp1200] How to Ensure Microcode Executes in the Correct Ord er?
by David Mentre 17 Feb '04

17 Feb '04

Hello Jo, > From: Jo Ueyama [mailto:ueyama@comp.lancs.ac.uk] > Sent: Tuesday, February 17, 2004 5:06 PM > What instruction/switch do I need to add in order to ensure that > instructions in microcode are carried in the correct order? > In the code > below the alu instruction MUST be performed *after* scratch read > finishes AND *before* write scratch is carried out. > Any ideas? You must use a signal to wait for the read to be done. More specifically: > #include "stdmac.uc" > > .local zero gpr1 $xfer .sig sig_scratch > > immed32[gpr1, 0x1100AB88] > immed32[zero, 0x0] > > scratch[read, $xfer, zero, 0, 1], ctx_swap, defer[1] ;; replace above line with: scratch[read, $xfer, zero, 0, 1], sig_done[sig_scratch] ctx_arb[sig_scratch] ;; after that point, you'll be sure that read is done > alu[$xfer, $xfer, +, gpr1] > scratch[write, $xfer, zero, 0, 1], ctx_swap > .endlocal I've not compiled that code, so I may I made a typo or forgotten something. Signals are used at length in Intel microcode. You should absolutely read Intel manuals if you want to do serious IXP programming. Look at Intel Programmers Reference, sect. 2.8, registers & signals. Yours, david -- David Mentré <mentre(a)tcl.ite.mee.com> - Research engineer (Ph.D.) Mitsubishi Electric ITE-TCL / European Telecommunication Research Lab Phone: +33 2 23 45 58 29 / Fax: +33 2 23 45 58 59 http://www.mitsubishi-electric-itce.fr

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halMeDrv.o micro-engine module problem in ENP-2611(IXP2400)?
by smiley 16 Feb '04

16 Feb '04

HI~~! halMeDrv.o micro-engine module problem in ENP-2611(IXP2400)? It was happened warning message in microEngine module when make module. /tmp/ccp3Lko3.s: Assembler messages: /tmp/ccp3Lko3.s:2365: Warning: .space repeat count is zero, ignored what do you mean to upper? Thanks for me!!!

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Do you know send to packet in PCI?
by paragon 16 Feb '04

16 Feb '04

Hello! Help need! Please~~ I don't know send to packet in PCI. I need to process PCI from RX in enp-2611. Send to packet in PCI through scratch ring ? Do you know PCI process logic? Ref. PCI bridge chip is Intel PCI21555. Thanks for me!

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RE: [ixp1200] File info from nfs?
by David Mentre 16 Feb '04

16 Feb '04

Hello Øyvind, > From: Øyvind Hvamstad [mailto:oyvindh@ifi.uio.no] > Sent: Monday, February 16, 2004 9:47 AM > Thanks, I have linux on the card. The thing that trew me off > was that I > had to use #include <sys/stat.h> and not the unix syscalls.h. Maybe an issue related to the compiler? Missing include files? > Sorry if I wasted your time. No worry. Just give more information next time. :) Yours, d. -- David Mentré <mentre(a)tcl.ite.mee.com> - Research engineer (Ph.D.) Mitsubishi Electric ITE-TCL / European Telecommunication Research Lab Phone: +33 2 23 45 58 29 / Fax: +33 2 23 45 58 59 http://www.mitsubishi-electric-itce.fr

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Video transcoding on IXP1200
by Mohammad Shorfuzzaman 16 Feb '04

16 Feb '04

Hi, I am working on in-network adaptation of media streams. We know about JMF (Java Media Framework- an API for using time-based media into Java applicaitons), which is used for capturing, processing (modifying), and presenting media data streams. Like JMF, Is there any C (microengine C) or low-level code (microcode) for media processing that runs on IXP1200; specifically I mean any code for vedio transcoding on IXP1200. Please help me if anybody has any idea. Regards, Shorfuzzaman ------------------------------------------------- This mail sent through IMP: http://horde.org/imp/

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