- ixp1200 - lists.cs.princeton.edu

Where to start?
by Veluchamy Dinakaran 30 Jul '03

30 Jul '03

Hello all, I am planning to carry out my, Masters Degree, project on the Intel IXP1200. I have gone through the documentation that was provided in the Intel SDK CD. Is there any book that deals with this system(IXP1200) in depth and helps out in programming too? Where should I start from? Please guide me. Thank you, D.Veluchamy

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number of rings
by Najati Imam 28 Jul '03

28 Jul '03

How does one determine the number of rings available to the system, or how many have been allocated; also, is there a way to determine which are in use? I would suspect, considering this is mostly just the Simple Count App that only 0-3 should be in use. Najati

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Re: [ixp1200] number of rings
by Shyamal Pandya 27 Jul '03

27 Jul '03

The resource managerand ixconfig code are the place to look for how the rings are alllocated. I believe the maximum is 32 rings for each queue group. For the simple count application only two of the microengines are used, one fr egress and one for egress. I don't remember the ring assignments but the code and the comments in the resource manager should be of good help here. Of course there is one ring per port from which the egress microblock reads packets. -- Shyamal Pandya Arizona State University Addr: 920 S Terrace Rd #102 Tempe AZ 85281 Phone: 1-480-966-1982 >From: Najati Imam <najati(a)netlab.uky.edu> >Reply-To: ixp1200(a)CS.Princeton.EDU >To: ixp1200(a)CS.Princeton.EDU >Subject: [ixp1200] number of rings >Date: Sat, 26 Jul 2003 17:50:03 -0400 (EDT) > >How does one determine the number of rings available to the system, or how >many have been allocated; also, is there a way to determine which are in >use? I would suspect, considering this is mostly just the Simple Count App >that only 0-3 should be in use. > >Najati > _________________________________________________________________ Help STOP SPAM with the new MSN 8 and get 2 months FREE* http://join.msn.com/?page=features/junkmail

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Counting Sample
by Daniel Peek 25 Jul '03

25 Jul '03

Hello all, I am trying to run the packet counter from Johnson & Kunze chapter 5 on a Radisys enp-2505. I can download and run the code just fine from the IDE, but no packets ever seem to be received. I replaced the board.h file with one that includes the CONFIG_BRIDALVEIL option. Any idea what the problem could be? Thanks in advance, Daniel Peek

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Re: [ixp1200] Compiling armtoolchain
by rasit＠cs.umanitoba.ca 23 Jul '03

23 Jul '03

Hi David, Moh'd is my student, so I can reply in behalf of him. Actually, unless 3 disk RH9 distribution is missing some package, your suggestion is not valid, as we installed *everything* on the host system, i.e., all packages on all 3 discs. As for the command *before* the failure, the whole package is build by a single make, so we don't know unless we dissect the makefile. You comments are still appreciated. Thanks, Rasit According to David Mentre: > > Hello, > > > From: Mohammad Shorfuzzaman [mailto:szaman@cs.umanitoba.ca] > > > I've downloaded the necessary tar files in the download directory and > > performed instruction as said in the README file. The > > completiion of "make" ends > > with these errors: > > > > makeinfo: Removing output file > > `/root/ixp1200_linux/src/glibc-2.1.3/manual/libc.info' due to > > errors; use > > --force to preserve. > > make[3]: *** [libc.info] Error 2 > > make[3]: Leaving directory > > `/root/ixp1200_linux/src/glibc-2.1.3/manual' > > make[2]: *** [manual/subdir_install] Error 2 > > make[2]: Leaving directory `/root/ixp1200_linux/src/glibc-2.1.3' > > make[1]: *** [install] Error 2 > > make[1]: Leaving directory `/root/ixp1200_linux/build/glibc-2.1.3' > > make: *** [glibc] Error 2 > > Your are not giving us enough information. You should give us the error > messages from the command executed before make aborts the compilation. > > As a rule of thumb, always give the last command executed by make. > > Anyway, I would say that your compilation fails to produce documentation, > probably because you don't have a needed package (info probably). > > Best regards, > d. > -- > David Mentré <mentre(a)tcl.ite.mee.com> - Research engineer > Mitsubishi Electric ITE-TCL / European Telecommunication Research Laboratory > > Phone: +33 2 23 45 58 29 / Fax: +33 2 23 45 58 59 > http://www.mitsubishi-electric-itce.fr > -- M. Rasit Eskicioglu E-mail: rasit(a)cs.umanitoba.ca Department of Computer Science Phone : (204) 474-8835 (Office) 528 Machray Hall (204) 474-8313 (Messages) University of Manitoba Fax : (204) 474-7609 Winnipeg, Manitoba R3T 2N2 Canada URL : http://www.cs.umanitoba.ca/~rasit

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Problems starting the sample count ace
by Øyvind Hvamstad 23 Jul '03

23 Jul '03

Hi, I'll try sending this again. I'm totally stuck here, could anyone tell me what the causes this error when running the sample count application (tutorial1)? The same occurs when running the l3forward! (From the serial console) rmdrvr: Setting up 64 bit bidirectional mode ingressAce: memory violation at pc=0x02027ce8, lr=0x400a6af8 (bad address=0x000) (When running ixstart) ixconfig: Starting microace ifaceInput ifaceInput: IX-ACE Initialization Failed Wed Dec 31 20:01:32 1969 ingress_ace.cpp, line 161: init : Couldn't open device /dev/if0.

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RE: [ixp1200] excessive collisions on 10 Mbit/s ethernet with BridalVeil Card
by Botham, Mick 23 Jul '03

23 Jul '03

Colin, Beware bit 16.8 in the PHY register set. 10MB half-duplex gives (by default) a loopback at the PHY. Best to avoid this configuration, or talk to the PHY and change this bit setting. Rgds Mick -----Original Message----- From: Colin Flanagan [mailto:colin.flanagan@ul.ie] Sent: 23 July 2003 09:40 To: ixp1200(a)CS.Princeton.EDU Subject: [ixp1200] excessive collisions on 10 Mbit/s ethernet with BridalVeil Card Hello, I am working with the IXP1200 book by Johnson & Kunze, and am trying to get the "single thread receive" code from chapter 5 to work successfully on the BridalVeil board. To this end I have written my own drivers for the octal MAC and have modified ue.o to reflect the 64-bit bi-directional IX bus. I can get everything to work and have the IXP1200 receiving packets successfully from a Smartbits over a 10Mbit/s simplex Ethernet link. However, I get excessive collisions on the link, these can range from 0.14 collisions per packet sent to 1.2 collisions per packet sent. This seems like very unusual behaviour. I wonder if anyone else has seen anything like this? Interestingly, the rate of collisions on the link seems to be related quite sensitively to the program running on the ready bus sequencer. With 12 RxRdy MAC0 instructions running on the RBS, there are no collisions at all. With a single RxRdy MAC0 followed by 11 NOP1 instructions, the rate of collisions per packet sent is 0.14. With alternating RxRdy MAC0 / TxRdy MAC0 pairs (repeated 6 times), I get 1.2 collisions per packet transmitted from the Smartbits. With 11 RxRdy MAC0 instructions and a single TxRdy MAC0 instruction, the rate is 0.7 collisions per packet transmitted from the Smartbits. In all cases the RDYBUS_SYNCH_COUNT_DEFAULT register is set to 0. The IX bus is running at 66MHz. I find this quite confusing, surely there should be no need for any collisions on a link with only one source (the Smartbits)? One thought that has occurred to me, is the IXF440 applying backpressure to the link? I can't see how this would happen though, in my understanding only a Flwctl instruction can cause backpressure to be applied. Alternatively, is the repetition rate of the ready bus program significant? All the RBS programs I have tried take 36 cycles, at 66MHz this should allow an adequate rate of sampling of the status bits. If anyone else has encountered problems like this, or can give me pointers to where I might be going wrong, I'd be very grateful to receive them. Thanks, Colin Flanagan Dept of Electronic & Computer Engineering University of Limerick Ireland PS FBI setup I am using: RCV_RDY_CTL = 0 XMIT_RDY_CTL = 0 FLOWCTL_MASK = 0 RDYBUS_SYNCH_COUNT_DEFAULT = 0 RDYBUS_TEMPLATE_CTL = 0xf00

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IXP1200 Simulator - Developer Workbench version 2.0.83
by abhi＠cs.unc.edu 23 Jul '03

23 Jul '03

Hi, I have just started working on IXP1200 and I have been following the book IXP1200 Programming by Erik Johnson and Aaron R. Kunze (Intel Press). I have been using the simulator that came with this book, Developer Workbench version 2.0.83. I am having problems with it and I think there are some bugs in the simulator. I was wondering whether there is some other simulator that can be used and how that can be available. Or is this is the simulator everyone uses, in that case I may need to reinstall it(I have done that once). Any help would be greatly appreciated. Thanks Abhishek Department of Computer Science, UNC, Chapel Hill.

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[Q] I have a question about IXP SDRAM mapped into PCI bus.
by Cho, joon-woo 23 Jul '03

23 Jul '03

Hello. I kwow that all region of IXP SDRAM is mapped into PCI bus. And I am curious about how do I read/write 'SDRAM mapped in PCI bus' using vera source. Is there a function to access that region? I think that 'VeraI2Oexp' function is used for reading/writing to SDRAM Am I right? If right, please give me more information. And can I access that address using 'variable' like below? example) int xx (allocated in SDRAM) write some data to xx Please answer my questions. Thanks

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Inter-ME uCode communication
by Cyrus Hall 22 Jul '03

22 Jul '03

I've finally gotten to the point in my code where I need to expand to multiple microengines. I think I've figured out what changes are needed in ixconfig, but other things are now vexing me. In the count example, the dispatch loop either forwards a packet with DL_SASink[] or DL_MESink[]. From the documentation, it sounds like DL_MESink[] passes the current packet reference to the next control block (next microengine). Just like DL_SASink[] has a inverse (DL_SASource[]), I would expect the the ME version to have one, something like DL_MESource[], yet no such macro exists. So what do must of you do? Have you just written a DL_MESource, or do you use one of the many other ways to syncronize between engines (SRAM CAM locks, or some other test-set mechanism)? I'm wondering which is the best way to go from here. Thanks, Cy

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