- ixp1200 - lists.cs.princeton.edu

IXF1002 : Multipacket mode for IXP12EB
by Yannis Haritakis 09 Jul '03

09 Jul '03

Hi all, Is there anyone that has an IXP 1200 EB development platform (IXP12EB) with the IXF1002 configured with Multipacket mode ON ? Thank you for your time, Yannis Haritakis

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incorrect register live ranges
by Cyrus Hall 08 Jul '03

08 Jul '03

I'm an experiencing what feels like register mis-allocation by uca. I allocate several registers, branch to another segment, allocate several more, and the newly allocated virtual registers end up being allocated in the same physical registers as the virts allocated in before the branch. I'm using an unconditional branch (br) to jump to the second segment (.segment 1) - same to come back to segment 0. IE: .segment 0 .local reg1 immed[reg1, 1] br[label#] done#: ctx_arb[kill] .endlocal .segment 1 label#: .local reg2 immed[reg2, 2] //ends up overwriting reg1 br[done#] .endlocal Does the compiler not calculate virtual live ranges across segments? Or is this a silly .local\.endlocal problem, and the compiler doesn't follow the live range on a branch outside a .local section? thanks, Cy

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I want to get previous IXP1200 mailing-list data
by Cho, joon-woo 08 Jul '03

08 Jul '03

Hello. I want to see previous IXP1200 mailing-list data. Is it opened? If yes, how can I access that information? Thanks.

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Question on SA core memory map
by Wong Kim Sing 08 Jul '03

08 Jul '03

Hi, Recently, I trying to use some location in the sdram to do some buffering, and I come across this problem. In the Microcode Programmer's Reference Manual, under the StrongARM Core Memory Map, the location of the cache flush area is locate at "0xA0000000 - 0xA0004000", and is it supposed to be correct right??? But how come under the file "C:/IXP1200/include/hal_sdram.h", the location is different (0xE0000000 - 0xE0FFFFFF)??? Is anyone know the reason why the location is different? Is the file suppose to be compiled together by SA? Best regard, Mike Mike Wong Kim Sing R&D Engineer Institute for Communications Research 20 Science Park Road TeleTech Park #02-34/37 Singapore Science Park II Singapore 117674 Tel: 65 68729030 DID : 65 68709320 Fax: 65 67795441 Email: wongks(a)icr.a-star.edu.sg Website: http://www.icr.a-star.edu.sg

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[Q] Long question
by Cho, joon-woo 07 Jul '03

07 Jul '03

Hello. I want to install IXP1200EB on Linux-host & I know there are many linux device driver versions. Additionally, is it possible running Linux on StrongARM? In other words, IXP board is operated as computer device & parallel StrongARM core which is resided in IXP can run linux for itself. Is it possible? And if possible, may I get open source like that function? Please give me answers. Thanks.

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[Q] How do I request a command to another PCI device?
by Cho, joon-woo 03 Jul '03

03 Jul '03

Hello. I installed IXP1200EB on the Linux machine with vera driver. And I want to send a command from IXP1200EB to another device. (Especially, SCSI controller or IDE HDD for DMA data transfer from there to IXP1200 SDRAM unti) Is it possible? And if possible, please let me know how I can. Thanks.

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round trip times in workbench
by liam noonan 02 Jul '03

02 Jul '03

Hi, Does anyone know how to configure workbench so that you can write to a file the round trip time for an individual packet (in simulation mode). The logging option does not meet my requirement. I am interested in how long it takes a packet to be received processed and transmitted i..e. an entrance time and exit time. Thanks Liam Noonan University of Limerick Ireland

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[Q] Is there a method to move packet from StrongArm to MAC ports directly?
by Cho, joon-woo 02 Jul '03

02 Jul '03

Hello. I want to know there is direct path from StrongARM to MAC ports. In other words, Can programmer send packets which are managed by StrongARM to the MAC ports not through MicroEngine? Please answer. thanks

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Gbit Receiving using two RFIFO elements per R.Request
by Yannis Haritakis 01 Jul '03

01 Jul '03

Hi all, The following problem was quite hard to discover and still I am not sure it is solved completely. I present it below for comments, suggestions and future use. The problem is around receiving *more* data using speculative receive requests on one gigabit port. The problem raises due to : 1. The default settings of the gigabit controller (IXF1002) (For the ENP2506 and the IXP1200EB using giga_drv.o module) 2. Wrong number of valid bytes reported in RCV_CTL register. 3. Using two RFIFO elements per receive request. The scenario is : 1. Eight threads (2 microEngines) issue speculative receive requests (RR) on one gigabit port in strict order. 2. For each thread, two RFIFO elements are statically assigned. 3. Each RR tries to fill two RFIFO elements. 4. We sent to the gigabit port one packet of 192Bytes (3 MPKTs) 5. We count the number of bytes and the number of MPKTs received The problem : 1. Sometimes we receive 4 MPKTs and the total number of (reported valid) bytes received are more than 192Bytes. The bug: In the ENP2506 the giga_drv.o module configures the gigabit port so as to assert rxvrdy signal when: 1. There are 128B available, OR 2. There is a "header" available. where "header" is defined as the first "headersz" bytes of a packet. By default, headersz is set to 64B long. Therefore, sometimes the rxvrdy signal is asserted when the port buffer has 64B. Then, the Receive State machine tries to fill 2 RFIFO elements from the data that exists in the port buffer. For sure, there are sufficient data to fill one RFIFO element. However, the second element may not be filled completely with valid data. The RCV_CNTL register, however, erroneously reports: 1. That two elements where filled, 2. That all bytes of the second element are valid. I checked the contents of the second RFIFO and found that the last 16 bytes were replicas of the last four correctly received bytes of the second MPKT. That is, if the MPKT in longwords was : ABCD EFGH IJKL MNOP, the received was : ABCD EFGH IJKL KLKL. The solution was to set the "headersz" value to 128B. Another solution would be to set the port not to signal rxvrdy when the header is available, however the driver giga_drv.o needs to be modified so as to allow the chacge of the specific bit of the port_mode register. That's all, Yannis Haritakis, www.ics.forth.gr www.csd.uoc.gr

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RE: [ixp1200] HashSv functions? (accessing the hash units from t he SA)
by Griffin, Chris 26 Jun '03

26 Jun '03

Cyrus, On my installation of the Intel Developer's Workbench, the hashsv.h file is in C:\IXP1200\include --Chris Griffin Embedded Software Engineer Visual Networks, Inc. cgriffin(a)visualnetworks.com phone: 301-296-2644 fax: 301-296-2303 > -----Original Message----- > From: Cyrus Hall [SMTP:hallcp@cs.colorado.edu] > Sent: Thursday, June 26, 2003 4:27 PM > To: ixp1200 List > Subject: [ixp1200] HashSv functions? (accessing the hash units from > the SA) > > I'm in need of a way to initialize a hashtable for the microengines > later use. There appears to be no direct way to access the hash unit on > the FBI, but the Microcode Software Reference Manual lists a family of > functions called HashSv_* (HashSv_Init, etc). The manual lists the > prototypes as being in hashsv.h. > > Yet I can't find hashsv.h anywhere. Is this another documented, but > nonexistent piece of functionality? And if this is the case, how would > people suggest initializing a hash table on the SA for use by the > micros? The values to initialize the table will be coming from a > configuration file, so hard-coding the table in the ME's doesn't work > for me. > > Thanks all, > Cyrus

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